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Searched refs:RVLocs (Results 1 – 25 of 25) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp284 SmallVector<CCValAssign, 16> RVLocs; in LowerCall() local
403 return lowerCallResult(Chain, Glue, RVLocs, dl, DAG, InVals); in LowerCall()
414 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in lowerCallResult()
415 const CCValAssign &VA = RVLocs[i]; in lowerCallResult()
634 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
635 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
654 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
670 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerReturn()
671 CCValAssign &VA = RVLocs[i]; in LowerReturn()
698 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerReturn()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp562 SmallVectorImpl<CCValAssign> &RVLocs, in AnalyzeReturnValues() argument
729 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
730 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
744 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
755 AnalyzeReturnValues(CCInfo, RVLocs, Outs); in LowerReturn()
761 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
762 CCValAssign &VA = RVLocs[i]; in LowerReturn()
940 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
944 AnalyzeReturnValues(CCInfo, RVLocs, Ins); in LowerCallResult()
947 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCallResult()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp534 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
535 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
547 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
550 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
560 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
561 CCValAssign &VA = RVLocs[i]; in LowerReturn()
782 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
783 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
789 for (unsigned I = 0; I != RVLocs.size(); ++I) { in LowerCallResult()
790 Chain = DAG.getCopyFromReg(Chain, DL, RVLocs[I].getLocReg(), in LowerCallResult()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp542 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
546 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
560 for (size_t i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
561 CCValAssign &VA = RVLocs[i]; in LowerReturn()
589 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
590 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerCallResult()
602 for (auto &Val : RVLocs) { in LowerCallResult()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp976 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerCallResult()
977 const CCValAssign &VA = RVLocs[i]; in LowerCallResult()
1034 SmallVector<CCValAssign, 16> RVLocs; in LowerCCCCallTo() local
1136 return LowerCallResult(Chain, InGlue, RVLocs, dl, DAG, InVals); in LowerCCCCallTo()
1330 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
1331 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
1352 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
1372 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerReturn()
1373 CCValAssign &VA = RVLocs[i]; in LowerReturn()
1400 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerReturn()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp238 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
264 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn_32() local
280 i != RVLocs.size(); in LowerReturn_32()
282 CCValAssign &VA = RVLocs[i]; in LowerReturn_32()
347 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn_64() local
365 CCValAssign &VA = RVLocs[i]; in LowerReturn_64()
393 if (i+1 < RVLocs.size() && RVLocs[i+1].getLocReg() == VA.getLocReg()) { in LowerReturn_64()
1107 SmallVector<CCValAssign, 16> RVLocs; in LowerCall_32() local
1116 if (RVLocs[i].getLocVT() == MVT::v2i32) { in LowerCall_32()
1443 SmallVector<CCValAssign, 16> RVLocs; in LowerCall_64() local
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2032 SmallVector<CCValAssign, 16> RVLocs; in FinishCall() local
2037 if (RVLocs.size() == 2 && RetVT == MVT::f64) { in FinishCall()
2040 MVT DestVT = RVLocs[0].getValVT(); in FinishCall()
2048 UsedRegs.push_back(RVLocs[0].getLocReg()); in FinishCall()
2049 UsedRegs.push_back(RVLocs[1].getLocReg()); in FinishCall()
2055 MVT CopyVT = RVLocs[0].getValVT(); in FinishCall()
2067 UsedRegs.push_back(RVLocs[0].getLocReg()); in FinishCall()
2215 SmallVector<CCValAssign, 16> RVLocs; in ARMEmitLibcall() local
2218 if (RVLocs.size() >= 2 && RetVT != MVT::f64) in ARMEmitLibcall()
2324 SmallVector<CCValAssign, 16> RVLocs; in SelectCall() local
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H A DARMISelLowering.cpp2201 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
2207 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCallResult()
2208 CCValAssign VA = RVLocs[i]; in LowerCallResult()
2227 VA = RVLocs[++i]; // skip ahead to next loc in LowerCallResult()
2241 VA = RVLocs[++i]; // skip ahead to next loc in LowerCallResult()
3138 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
3183 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
3199 AFI->setReturnRegsCount(RVLocs.size()); in LowerReturn()
3214 i != RVLocs.size(); in LowerReturn()
3216 CCValAssign &VA = RVLocs[i]; in LowerReturn()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp662 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
663 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
753 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
758 for (unsigned I = 0, OutsIndex = 0, E = RVLocs.size(); I != E; in LowerReturn()
760 CCValAssign &VA = RVLocs[I]; in LowerReturn()
1101 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
1107 for (unsigned I = 0, InsIndex = 0, E = RVLocs.size(); I != E; in LowerCallResult()
1109 CCValAssign &VA = RVLocs[I]; in LowerCallResult()
2791 SmallVector<CCValAssign, 16> RVLocs; in IsEligibleForTailCallOptimization() local
2792 CCState CCInfo(CalleeCC, false, MF, RVLocs, C); in IsEligibleForTailCallOptimization()
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H A DX86FastISel.cpp3580 SmallVector<CCValAssign, 16> RVLocs; in fastLowerCall() local
3581 CCState CCRetInfo(CC, IsVarArg, *FuncInfo.MF, RVLocs, in fastLowerCall()
3587 for (unsigned i = 0; i != RVLocs.size(); ++i) { in fastLowerCall()
3588 CCValAssign &VA = RVLocs[i]; in fastLowerCall()
3630 CLI.NumResultRegs = RVLocs.size(); in fastLowerCall()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp138 SmallVector<CCValAssign, 16> RVLocs; in canLowerReturn() local
139 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in canLowerReturn()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp71 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
72 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
373 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
376 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
386 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
387 CCValAssign &VA = RVLocs[i]; in LowerReturn()
789 SmallVector<CCValAssign, 16> RVLocs; in LowerCall() local
790 CCState RVInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCall()
801 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCall()
802 CCValAssign &VA = RVLocs[i]; in LowerCall()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1501 SmallVector<CCValAssign, 16> RVLocs; in finishCall() local
1502 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in finishCall()
1504 CCValAssign &VA = RVLocs[0]; in finishCall()
1505 assert(RVLocs.size() == 1 && "No support for multi-reg return values!"); in finishCall()
1587 SmallVector<CCValAssign, 16> RVLocs; in fastLowerCall() local
1588 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, RVLocs, *Context); in fastLowerCall()
1590 if (RVLocs.size() > 1) in fastLowerCall()
H A DPPCISelLowering.cpp5235 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
5236 CCState CCRetInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
5245 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerCallResult()
5246 CCValAssign &VA = RVLocs[i]; in LowerCallResult()
5256 VA = RVLocs[++i]; // skip ahead to next loc in LowerCallResult()
7687 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
7688 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
7701 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
7702 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
7714 CCValAssign &VA = RVLocs[i]; in LowerReturn()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1667 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
1668 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
1679 for (CCValAssign const &RVLoc : RVLocs) { in LowerCallResult()
1698 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
1699 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
1714 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
1717 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
1732 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerReturn()
1733 CCValAssign &VA = RVLocs[i]; in LowerReturn()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1275 SmallVector<CCValAssign, 16> RVLocs; in finishCall() local
1276 MipsCCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in finishCall()
1283 if (RVLocs.size() != 1) in finishCall()
1286 MVT CopyVT = RVLocs[0].getValVT(); in finishCall()
1296 ResultReg).addReg(RVLocs[0].getLocReg()); in finishCall()
1297 CLI.InRegs.push_back(RVLocs[0].getLocReg()); in finishCall()
H A DMipsISelLowering.cpp3510 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
3520 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCallResult()
3521 CCValAssign &VA = RVLocs[i]; in LowerCallResult()
3524 SDValue Val = DAG.getCopyFromReg(Chain, DL, RVLocs[i].getLocReg(), in LowerCallResult()
3525 RVLocs[i].getLocVT(), InGlue); in LowerCallResult()
3793 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
3794 MipsCCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
3826 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
3830 MipsCCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
3839 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp189 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
190 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
207 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
210 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
223 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
224 CCValAssign &VA = RVLocs[i]; in LowerReturn()
355 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
366 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCallResult()
368 if (RVLocs[i].getValVT() == MVT::i1) { in LowerCallResult()
389 RetVal = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), in LowerCallResult()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp889 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
890 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
895 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerCallResult()
896 CCValAssign &VA = RVLocs[i]; in LowerCallResult()
1064 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
1065 CCState CCInfo(CCID, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
1078 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
1079 CCState CCInfo(CCID, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
1091 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerReturn()
1092 CCValAssign &VA = RVLocs[i]; in LowerReturn()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp4301 SmallVector<CCValAssign> RVLocs; in LowerCall() local
4302 CCState RetCCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerCall()
4306 for (auto &VA : RVLocs) { in LowerCall()
4325 SmallVector<CCValAssign> RVLocs; in CanLowerReturn() local
4326 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
4345 SmallVector<CCValAssign> RVLocs; in LowerReturn() local
4348 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
4353 if (CallConv == CallingConv::GHC && !RVLocs.empty()) in LowerReturn()
4359 for (unsigned i = 0, e = RVLocs.size(); i < e; ++i) { in LowerReturn()
4360 CCValAssign &VA = RVLocs[i]; in LowerReturn()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3108 SmallVector<CCValAssign, 16> RVLocs; in finishCall() local
3109 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in finishCall()
3113 for (unsigned i = 0; i != RVLocs.size(); ++i) { in finishCall()
3114 CCValAssign &VA = RVLocs[i]; in finishCall()
3130 CLI.NumResultRegs = RVLocs.size(); in finishCall()
H A DAArch64ISelLowering.h1031 const SmallVectorImpl<CCValAssign> &RVLocs,
H A DAArch64ISelLowering.cpp7141 const SmallVectorImpl<CCValAssign> &RVLocs, const SDLoc &DL, in LowerCallResult() argument
7146 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCallResult()
7147 CCValAssign VA = RVLocs[i]; in LowerCallResult()
7565 SmallVector<CCValAssign, 16> RVLocs; in LowerCall() local
7579 if (any_of(RVLocs, HasSVERegLoc) || any_of(ArgLocs, HasSVERegLoc)) in LowerCall()
8228 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
8229 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
8243 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
8244 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
8251 for (unsigned i = 0, realRVLocIdx = 0; i != RVLocs.size(); in LowerReturn()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp18581 SmallVector<CCValAssign, 16> RVLocs; in LowerCall() local
18586 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerCall()
18587 auto &VA = RVLocs[i]; in LowerCall()
18616 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
18617 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
18645 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
18648 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
18654 if (CallConv == CallingConv::GHC && !RVLocs.empty()) in LowerReturn()
18663 CCValAssign &VA = RVLocs[i]; in LowerReturn()
18675 Register RegHi = RVLocs[++i].getLocReg(); in LowerReturn()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp3062 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
3063 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
3097 SmallVector<CCValAssign, 48> RVLocs; in LowerReturn() local
3101 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
3112 for (unsigned I = 0, RealRVLocIdx = 0, E = RVLocs.size(); I != E; in LowerReturn()
3114 CCValAssign &VA = RVLocs[I]; in LowerReturn()
3180 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
3181 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
3186 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCallResult()
3187 CCValAssign VA = RVLocs[i]; in LowerCallResult()