Home
last modified time | relevance | path

Searched refs:RTS (Results 1 – 25 of 73) sorted by relevance

123

/freebsd-14.2/sys/contrib/device-tree/Bindings/leds/
H A Drichtek,rt8515.yaml16 RFS and RTS.
42 description: The resistance value of the RTS resistor. This
44 for the property torch-max-microamp to work, the RTS resistor
71 is hardwired to the component using the RTS resistor to
73 according to the formula Imax = 5500 / RTS. The lowest
77 current below the hardware limit. This requires the RTS
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVAsmPrinter.cpp343 RISCVTargetStreamer &RTS = in emitDirectiveOptionArch() local
359 RTS.emitDirectiveOptionPush(); in emitDirectiveOptionArch()
369 RISCVTargetStreamer &RTS = in runOnMachineFunction() local
378 RTS.emitDirectiveOptionPop(); in runOnMachineFunction()
383 RISCVTargetStreamer &RTS = in emitStartOfAsmFile() local
409 RTS.setFlagsFromFeatures(SubtargetInfo); in emitStartOfAsmFile()
417 RISCVTargetStreamer &RTS = in emitEndOfAsmFile() local
421 RTS.finishAttributeSection(); in emitEndOfAsmFile()
426 RISCVTargetStreamer &RTS = in emitAttributes() local
437 auto &RTS = in emitFunctionEntryLabel() local
[all …]
/freebsd-14.2/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm-venice-gw72xx-0x-rs232-rts.dtso5 * GW72xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dtso5 * GW73xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dts5 * GW73xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
H A Dimx8mm-venice-gw72xx-0x-rs232-rts.dts5 * GW72xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
H A Dimx8mq-hummingboard-pulse.dts166 * reconfigured to enable RTS/CTS on UART3
209 * Header. To use RTS/CTS on UART3 comment them out
/freebsd-14.2/sys/contrib/device-tree/Bindings/serial/
H A Drs485.yaml9 description: The RTS signal is capable of automatically controlling line
33 description: drive RTS low when sending (default is high).
37 description: Polarity of receiver enable signal (when separate from RTS).
H A Dfsl-mxs-auart.txt22 - uart-has-rtscts : Indicate the UART has RTS and CTS lines
25 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
H A Dserial.yaml62 the UART's RTS line.
68 for RTS/CTS hardware flow control, and that they are available for use
78 description: CTS and RTS pins are swapped.
H A Dcirrus,clps711x-uart.txt11 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
H A Dsirf-uart.txt13 - rts-gpios: RTS pin for USP-based UART if uart-has-rtscts is true
/freebsd-14.2/sys/contrib/device-tree/src/arm/
H A Dimx6ull-dhcom-drc02.dts23 * The signals for CAN2 TX and RX are routed to the DHCOM UART1 RTS/CTS pins.
24 * Therefore the UART RTS/CTS must be output on other DHCOM pins, see uart1
H A Dam335x-netcom-plus-2xx.dts26 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* RTS */
39 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* RTS */
H A Dimx6ul-ccimx6ulsbcpro.dts62 /* CAN2 is multiplexed with UART2 RTS/CTS */
201 /* UART2 RTS/CTS muxed with CAN2 */
209 /* UART3 RTS/CTS muxed with CAN 1 */
H A Dste-dbx5x0-pinctrl.dtsi21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
32 pins = "GPIO1_AJ3"; /* RTS */
79 pins = "GPIO7_AG5"; /* RTS */
90 pins = "GPIO7_AG5"; /* RTS */
H A Dstm32mp157a-iot-box.dts57 /* Note: HW flow control is broken, hence using custom CTS/RTS gpios */
/freebsd-14.2/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-a64-orangepi-win.dts382 /* On Pi-2 connector, RTS/CTS optional */
389 /* On Pi-2 connector, RTS/CTS optional */
396 /* On Pi-2 connector (labeled for SPI1), RTS/CTS optional */
H A Dsun50i-a64-pine64.dts285 /* On Wifi/BT connector, with RTS/CTS */
306 /* On Euler connector, RTS/CTS optional */
/freebsd-14.2/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/
H A Dserial.txt14 CTS, RTS, DCD, DSR, DTR, and RI.
/freebsd-14.2/sys/contrib/device-tree/Bindings/net/bluetooth/
H A Dnxp,88w8987-bt.yaml12 works on standard H4 protocol over 4-wire UART. The RTS and CTS lines
/freebsd-14.2/stand/i386/boot2/
H A Dsio.S38 movb $0x3,%al # Set RTS,
/freebsd-14.2/sys/contrib/device-tree/Bindings/gnss/
H A Dbrcm,bcm4751.yaml15 bus requires CTS/RTS support. The number of the capsule is more
/freebsd-14.2/sys/contrib/device-tree/src/arm64/renesas/
H A Drzg2lc-smarc-pinfunction.dtsi62 <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
/freebsd-14.2/sys/contrib/device-tree/Bindings/net/nfc/
H A Dnfcmrvl.txt16 - flow-control: Specifies that the chip is using RTS/CTS.

123