Searched refs:RMValue (Results 1 – 3 of 3) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4604 SDValue RMValue = Op->getOperand(1); in LowerSET_ROUNDING() local
4616 RMValue = DAG.getNode(ISD::SUB, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
4618 RMValue = DAG.getNode(ISD::AND, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
4620 RMValue = in LowerSET_ROUNDING()
4621 DAG.getNode(ISD::SHL, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
4623 RMValue = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, RMValue); in LowerSET_ROUNDING()
4637 FPCR = DAG.getNode(ISD::OR, DL, MVT::i64, FPCR, RMValue); in LowerSET_ROUNDING()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6412 SDValue RMValue = Op->getOperand(1); in LowerSET_ROUNDING() local
6425 RMValue = DAG.getNode(ISD::SUB, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6427 RMValue = DAG.getNode(ISD::AND, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6429 RMValue = DAG.getNode(ISD::SHL, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6444 FPSCR = DAG.getNode(ISD::OR, DL, MVT::i32, FPSCR, RMValue); in LowerSET_ROUNDING()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 11291 SDValue RMValue = Op->getOperand(1); in lowerSET_ROUNDING() local
11306 RMValue = DAG.getNode(ISD::ZERO_EXTEND, DL, XLenVT, RMValue); in lowerSET_ROUNDING()
11308 SDValue Shift = DAG.getNode(ISD::SHL, DL, XLenVT, RMValue, in lowerSET_ROUNDING()
11312 RMValue = DAG.getNode(ISD::AND, DL, XLenVT, Shifted, in lowerSET_ROUNDING()
11315 RMValue); in lowerSET_ROUNDING()
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