Searched refs:RISCVInstrInfo (Results 1 – 18 of 18) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 69 RISCVInstrInfo::RISCVInstrInfo(RISCVSubtarget &STI) in RISCVInstrInfo() function in RISCVInstrInfo 73 MCInst RISCVInstrInfo::getNop() const { in getNop() 1057 unsigned RISCVInstrInfo::insertBranch( in insertBranch() 1159 bool RISCVInstrInfo::reverseBranchCondition( in reverseBranchCondition() 1425 RISCVInstrInfo::optimizeSelect(MachineInstr &MI, in optimizeSelect() 1620 void RISCVInstrInfo::finalizeInsInstrs( in finalizeInsInstrs() 1839 bool RISCVInstrInfo::getMachineCombinerPatterns( in getMachineCombinerPatterns() 1928 void RISCVInstrInfo::genAlternativeCodeSequence( in genAlternativeCodeSequence() 2274 bool RISCVInstrInfo::shouldClusterMemOps( in shouldClusterMemOps() 2424 RISCVInstrInfo::getOutliningCandidateInfo( in getOutliningCandidateInfo() [all …]
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| H A D | RISCV.td | 30 include "RISCVInstrInfo.td" 58 def RISCVInstrInfo : InstrInfo { 72 let InstructionSet = RISCVInstrInfo;
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| H A D | RISCVPostRAExpandPseudoInsts.cpp | 31 const RISCVInstrInfo *TII; 54 TII = static_cast<const RISCVInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| H A D | RISCVOptWInstrs.cpp | 59 bool removeSExtWInstrs(MachineFunction &MF, const RISCVInstrInfo &TII, 61 bool stripWSuffixes(MachineFunction &MF, const RISCVInstrInfo &TII, 622 const RISCVInstrInfo &TII, in removeSExtWInstrs() 674 const RISCVInstrInfo &TII, in stripWSuffixes() 709 const RISCVInstrInfo &TII = *ST.getInstrInfo(); in runOnMachineFunction()
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| H A D | RISCVSubtarget.h | 86 RISCVInstrInfo InstrInfo; 112 const RISCVInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
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| H A D | RISCVExpandAtomicPseudoInsts.cpp | 34 const RISCVInstrInfo *TII; 259 static void doAtomicBinOpExpansion(const RISCVInstrInfo *TII, MachineInstr &MI, in doAtomicBinOpExpansion() 300 static void insertMaskedMerge(const RISCVInstrInfo *TII, DebugLoc DL, in insertMaskedMerge() 322 static void doMaskedAtomicBinOpExpansion(const RISCVInstrInfo *TII, in doMaskedAtomicBinOpExpansion() 427 static void insertSext(const RISCVInstrInfo *TII, DebugLoc DL, in insertSext()
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| H A D | RISCVInstrInfo.h | 50 class RISCVInstrInfo : public RISCVGenInstrInfo { 53 explicit RISCVInstrInfo(RISCVSubtarget &STI);
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| H A D | RISCVPushPopOptimizer.cpp | 27 const RISCVInstrInfo *TII;
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| H A D | RISCVFrameLowering.cpp | 71 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitSCSPrologue() 126 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitSCSEpilogue() 467 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitPrologue() 666 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitPrologue() 1151 const RISCVInstrInfo &TII) { in estimateFunctionSizeInBytes() 1192 const RISCVInstrInfo *TII = MF.getSubtarget<RISCVSubtarget>().getInstrInfo(); in processFunctionBeforeFrameFinalized()
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| H A D | RISCVMoveMerger.cpp | 27 const RISCVInstrInfo *TII;
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| H A D | RISCVMakeCompressible.cpp | 324 const RISCVInstrInfo &TII = *STI.getInstrInfo(); in runOnMachineFunction()
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| H A D | RISCVExpandPseudoInsts.cpp | 34 const RISCVInstrInfo *TII; 392 const RISCVInstrInfo *TII;
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| H A D | RISCVRegisterInfo.cpp | 203 const RISCVInstrInfo *TII = ST.getInstrInfo(); in adjustReg()
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| H A D | RISCVInstrInfo.td | 1 //===-- RISCVInstrInfo.td - Target Description for RISC-V --*- tablegen -*-===//
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| H A D | RISCVISelLowering.cpp | 16775 const RISCVInstrInfo &TII = *Subtarget.getInstrInfo(); in EmitLoweredCascadedSelect() 16914 const RISCVInstrInfo &TII = *Subtarget.getInstrInfo(); in emitSelectPseudo() 17114 const RISCVInstrInfo &TII = *Subtarget.getInstrInfo(); in emitFROUND()
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| H A D | RISCVInstrInfoVPseudos.td | 525 // RISCVInstrInfo.h.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 121 const RISCVInstrInfo &TII;
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| /freebsd-14.2/lib/clang/libllvm/ |
| H A D | Makefile | 1568 SRCS_MIN+= Target/RISCV/RISCVInstrInfo.cpp
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