Searched refs:RHSMask (Results 1 – 5 of 5) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 453 unsigned LHSMask, unsigned RHSMask, InstCombiner::BuilderTy &Builder) { in foldLogOpOfMaskedICmpsAsymmetric() argument 463 RHSMask = conjugateICmpMask(RHSMask); in foldLogOpOfMaskedICmpsAsymmetric() 465 if ((LHSMask & Mask_NotAllZeros) && (RHSMask & BMask_Mixed)) { in foldLogOpOfMaskedICmpsAsymmetric() 471 } else if ((LHSMask & BMask_Mixed) && (RHSMask & Mask_NotAllZeros)) { in foldLogOpOfMaskedICmpsAsymmetric() 495 unsigned RHSMask = MaskPair->second; in foldLogOpOfMaskedICmps() local 496 unsigned Mask = LHSMask & RHSMask; in foldLogOpOfMaskedICmps() 501 LHS, RHS, IsAnd, A, B, C, D, E, PredL, PredR, LHSMask, RHSMask, in foldLogOpOfMaskedICmps()
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| H A D | InstCombineVectorOps.cpp | 3076 ArrayRef<int> RHSMask; in visitShuffleVectorInst() local 3080 RHSMask = RHSShuffle->getShuffleMask(); in visitShuffleVectorInst() 3116 eltMask = RHSMask[Mask[i]-LHSWidth]; in visitShuffleVectorInst() 3149 if (isSplat || newMask == LHSMask || newMask == RHSMask || newMask == Mask) { in visitShuffleVectorInst()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 11456 uint32_t RHSMask = getPermuteMask(RHS); in performAndCombine() local 11457 if (LHSMask != ~0u && RHSMask != ~0u) { in performAndCombine() 11460 if (LHSMask > RHSMask) { in performAndCombine() 11461 std::swap(LHSMask, RHSMask); in performAndCombine() 11480 uint32_t Mask = LHSMask & RHSMask; in performAndCombine() 12082 uint32_t RHSMask = getPermuteMask(RHS); in performOrCombine() local 12084 if (LHSMask != ~0u && RHSMask != ~0u) { in performOrCombine() 12087 if (LHSMask > RHSMask) { in performOrCombine() 12088 std::swap(LHSMask, RHSMask); in performOrCombine() 12104 RHSMask &= ~LHSUsedLanes; in performOrCombine() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7725 const APInt &RHSMask = N1O1C->getAPIntValue(); in visitORLike() local 7727 if (DAG.MaskedValueIsZero(N0.getOperand(0), RHSMask&~LHSMask) && in visitORLike() 7728 DAG.MaskedValueIsZero(N1.getOperand(0), LHSMask&~RHSMask)) { in visitORLike() 7732 DAG.getConstant(LHSMask | RHSMask, DL, VT)); in visitORLike() 8432 SDValue RHSMask; // AND value if any. in MatchRotate() local 8433 matchRotateHalf(DAG, RHS, RHSShift, RHSMask); in MatchRotate() 8450 extractShiftForRotate(DAG, LHSShift, RHS, RHSMask, DL)) in MatchRotate() 8471 std::swap(LHSMask, RHSMask); in MatchRotate() 8491 if (LHSMask.getNode() || RHSMask.getNode()) { in MatchRotate() 8500 if (RHSMask.getNode()) { in MatchRotate() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 14598 int RHSMask[4] = {-1, -1, -1, -1}; in lowerShuffleAsLanePermuteAndSHUFP() local 14608 auto &LaneMask = (i & 1) ? RHSMask : LHSMask; in lowerShuffleAsLanePermuteAndSHUFP() 14614 SDValue RHS = DAG.getVectorShuffle(VT, DL, V1, V2, RHSMask); in lowerShuffleAsLanePermuteAndSHUFP() 44876 SmallVector<int, 64> LHSMask, RHSMask, CondMask; in combineSelect() local 44879 getTargetShuffleMask(RHS.getNode(), SimpleVT, true, RHSOps, RHSMask)) { in combineSelect() 44886 RHSMask[i] = 0x80; in combineSelect() 44889 RHSMask[i] = isUndefOrZero(RHSMask[i]) ? 0x80 : RHSMask[i]; in combineSelect() 44895 getConstVector(RHSMask, SimpleVT, DAG, DL, true)); in combineSelect()
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