| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelDAGToDAG.cpp | 107 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeS9() local 109 RHSC = -RHSC; in SelectAddrModeS9() 112 if (!isInt<9>(RHSC)) in SelectAddrModeS9() 120 Offset = CurDAG->getTargetConstant(RHSC, SDLoc(Addr), MVT::i32); in SelectAddrModeS9() 136 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeFar() local 138 RHSC = -RHSC; in SelectAddrModeFar() 140 Offset = CurDAG->getTargetConstant(RHSC, SDLoc(Addr), MVT::i32); in SelectAddrModeFar()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 700 RHSC = -RHSC; in SelectAddrModeImm12() 730 RHSC = RHSC & ~1; in SelectLdStSOReg() 734 RHSC = - RHSC; in SelectLdStSOReg() 951 RHSC = -RHSC; in SelectAddrMode3() 1021 RHSC = -RHSC; in IsAddressingMode5() 1263 RHSC = -RHSC; in SelectTAddrModeImm7() 1318 RHSC = -RHSC; in SelectT2AddrModeImm12() 1352 RHSC = -RHSC; in SelectT2AddrModeImm8() 1375 RHSC = -RHSC; in SelectT2AddrModeImm8() 1424 RHSC = -RHSC; in SelectT2AddrModeImm7() [all …]
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| H A D | ARMISelLowering.cpp | 4734 unsigned C = RHSC->getZExtValue(); in getARMCmp() 19775 if (RHSC < 0 && RHSC > -256) { in getARMIndexedAddressParts() 19789 if (RHSC < 0 && RHSC > -0x1000) { in getARMIndexedAddressParts() 19832 if (RHSC < 0 && RHSC > -0x100) { // 8 bits. in getT2IndexedAddressParts() 19837 } else if (RHSC > 0 && RHSC < 0x100) { // 8 bit, no zero. in getT2IndexedAddressParts() 19862 int RHSC = (int)RHS->getZExtValue(); in getMVEIndexedAddressParts() local 19865 if (RHSC < 0 && RHSC > -Limit * Scale && RHSC % Scale == 0) { in getMVEIndexedAddressParts() 19870 } else if (RHSC > 0 && RHSC < Limit * Scale && RHSC % Scale == 0) { in getMVEIndexedAddressParts() 19885 if (IsInRange(RHSC, 0x80, 1)) in getMVEIndexedAddressParts() 19889 IsInRange(RHSC, 0x80, 4)) in getMVEIndexedAddressParts() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 95 int RHSC = (int)RHS->getZExtValue(); in SelectAddr() local 99 RHSC = -RHSC; in SelectAddr() 110 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i16); in SelectAddr() 120 if (isUInt<6>(RHSC) && (VT == MVT::i8 || VT == MVT::i16)) { in SelectAddr() 122 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i8); in SelectAddr()
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| H A D | AVRISelLowering.cpp | 1122 int RHSC = RHS->getSExtValue(); in getPreIndexedAddressParts() local 1124 RHSC = -RHSC; in getPreIndexedAddressParts() 1126 if ((VT == MVT::i16 && RHSC != -2) || (VT == MVT::i8 && RHSC != -1)) { in getPreIndexedAddressParts() 1131 Offset = DAG.getConstant(RHSC, DL, MVT::i8); in getPreIndexedAddressParts() 1179 int RHSC = RHS->getSExtValue(); in getPostIndexedAddressParts() local 1181 RHSC = -RHSC; in getPostIndexedAddressParts() 1182 if ((VT == MVT::i16 && RHSC != 2) || (VT == MVT::i8 && RHSC != 1)) { in getPostIndexedAddressParts() 1193 Offset = DAG.getConstant(RHSC, DL, MVT::i8); in getPostIndexedAddressParts()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 816 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local 817 if (RHSC->getZExtValue() == 0xFFFFFFFF) { in IntCondCCodeToICC() 826 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local 827 if (RHSC->getZExtValue() == 0) in IntCondCCodeToICC() 834 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local 835 if (RHSC->getZExtValue() == 0xFFFFFFFF) { in IntCondCCodeToICC() 844 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local 845 if (RHSC->getZExtValue() == 0) in IntCondCCodeToICC()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 2148 const APInt *RHSC; in foldBitwiseLogicWithIntrinsics() local 2151 !match(I.getOperand(1), m_APInt(RHSC)))) in foldBitwiseLogicWithIntrinsics() 2172 ? RHSC->byteSwap() in foldBitwiseLogicWithIntrinsics() 3160 const APInt *LHSC = nullptr, *RHSC = nullptr; in foldAndOrOfICmps() local 3162 match(RHS1, m_APInt(RHSC)); in foldAndOrOfICmps() 3266 if (!LHSC || !RHSC) in foldAndOrOfICmps() 3282 SmallC = RHSC; in foldAndOrOfICmps() 3287 BigC = RHSC; in foldAndOrOfICmps() 3312 isSignBitCheck(PredR, *RHSC, TrueIfSignedR) && in foldAndOrOfICmps() 4601 const APInt *RHSC; in visitXor() local [all …]
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| H A D | InstCombineCompares.cpp | 3930 Constant *RHSC = dyn_cast<Constant>(Op1); in foldICmpInstWithConstantNotInt() local 3932 if (!RHSC || !LHSI) in foldICmpInstWithConstantNotInt() 3942 if (RHSC->isNullValue() && in foldICmpInstWithConstantNotInt() 4854 if (Constant *RHSC = dyn_cast<Constant>(Op1)) in foldICmpBinOp() local 4855 if (RHSC->isNotMinSignedValue()) in foldICmpBinOp() 4857 ConstantExpr::getNeg(RHSC)); in foldICmpBinOp() 5702 NewOp1 = ConstantExpr::getIntToPtr(RHSC, SrcTy); in foldICmpWithCastOp() 7235 if (!isa<ConstantFP>(RHSC)) return nullptr; in foldFCmpIntToFPConst() 7236 const APFloat &RHS = cast<ConstantFP>(RHSC)->getValueAPF(); in foldFCmpIntToFPConst() 7492 if (!match(RHSC, m_AnyZeroFP())) in foldFCmpReciprocalAndZero() [all …]
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| H A D | InstCombineCalls.cpp | 1803 const APInt *RHSC; in visitCallInst() local 1804 if (match(I1, m_APIntAllowUndef(RHSC))) { in visitCallInst() 1811 if (LHS_CR.icmp(Pred, *RHSC)) in visitCallInst() 1813 if (LHS_CR.icmp(ICmpInst::getSwappedPredicate(Pred), *RHSC)) in visitCallInst() 1815 ConstantInt::get(II->getType(), *RHSC)); in visitCallInst()
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| H A D | InstCombineInternal.h | 633 Constant *RHSC);
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCExpr.cpp | 129 if (const MCConstantExpr *RHSC = dyn_cast<MCConstantExpr>(BE.getRHS())) { in print() local 130 if (RHSC->getValue() < 0) { in print() 131 OS << RHSC->getValue(); in print()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 392 int64_t RHSC = RHSDef->getOperand(1).getCImm()->getSExtValue(); in selectAddrRegImm() local 393 if (isInt<12>(RHSC)) { in selectAddrRegImm() 397 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC); }, in selectAddrRegImm() 401 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC); }}}; in selectAddrRegImm()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 724 if (!RHSC) in SelectShiftedRegisterFromAnd() 727 APInt AndMask = RHSC->getAPIntValue(); in SelectShiftedRegisterFromAnd() 1041 int64_t RHSC = RHS->getSExtValue(); in SelectAddrModeIndexedBitWidth() local 1045 if ((RHSC & (Size - 1)) == 0 && RHSC >= -(Range << Scale) && in SelectAddrModeIndexedBitWidth() 1046 RHSC < (Range << Scale)) { in SelectAddrModeIndexedBitWidth() 1057 uint64_t RHSC = RHS->getZExtValue(); in SelectAddrModeIndexedBitWidth() local 1061 if ((RHSC & (Size - 1)) == 0 && RHSC < (Range << Scale)) { in SelectAddrModeIndexedBitWidth() 1112 int64_t RHSC = (int64_t)RHS->getZExtValue(); in SelectAddrModeIndexed() local 1114 if (isValidAsScaledImmediate(RHSC, 0x1000, Size)) { in SelectAddrModeIndexed() 1151 int64_t RHSC = RHS->getSExtValue(); in SelectAddrModeUnscaled() local [all …]
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| H A D | AArch64ISelLowering.cpp | 3547 uint64_t C = RHSC->getZExtValue(); in getAArch64Cmp() 3656 if (!Cmp && (RHSC->isZero() || RHSC->isOne())) { in getAArch64Cmp() 3658 if ((CC == ISD::SETNE) ^ RHSC->isZero()) in getAArch64Cmp() 8937 if (RHSC && RHSC->getZExtValue() == 0 && ProduceNonFlagSettingCondBr) { in LowerBR_CC() 8980 if (RHSC && RHSC->getSExtValue() == -1 && CC == ISD::SETGT && in LowerBR_CC() 9517 ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS); in LowerSELECT_CC() local 9521 if (CC == ISD::SETGT && RHSC && RHSC->isAllOnes() && CTVal && CFVal && in LowerSELECT_CC() 9536 RHSC && RHSC->isZero() && CFVal && CFVal->isZero() && in LowerSELECT_CC() 24273 int64_t RHSC = RHS->getSExtValue(); in getIndexedAddressParts() local 24275 RHSC = -(uint64_t)RHSC; in getIndexedAddressParts() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 2339 auto *RHSC = dyn_cast<SCEVConstant>(RHS); in willNotOverflow() local 2341 if (!RHSC) in willNotOverflow() 2343 APInt C = RHSC->getAPInt(); in willNotOverflow() 3400 if (RHSC->getValue()->isOne()) in getURemExpr() 3404 if (RHSC->getAPInt().isPowerOf2()) { in getURemExpr() 3441 if (RHSC->getValue()->isOne()) in getUDivExpr() 3446 if (!RHSC->getValue()->isZero()) { in getUDivExpr() 3455 if (!RHSC->getAPInt().isPowerOf2()) in getUDivExpr() 3464 const APInt &DivInt = RHSC->getAPInt(); in getUDivExpr() 5299 if (RHSC->getValue().isSignMask()) in MatchBinaryOp() [all …]
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| H A D | BasicAliasAnalysis.cpp | 376 if (ConstantInt *RHSC = dyn_cast<ConstantInt>(BOp->getOperand(1))) { in GetLinearExpression() local 377 APInt RHS = Val.evaluateWith(RHSC->getValue()); in GetLinearExpression()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1350 uint64_t RHSC = RHS->getZExtValue(); in getPostIndexedAddressParts() local 1351 if ((VT == MVT::i16 && RHSC != 2) || in getPostIndexedAddressParts() 1352 (VT == MVT::i8 && RHSC != 1)) in getPostIndexedAddressParts() 1356 Offset = DAG.getConstant(RHSC, SDLoc(N), VT); in getPostIndexedAddressParts()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXAsmPrinter.cpp | 2133 if (const MCConstantExpr *RHSC = dyn_cast<MCConstantExpr>(BE.getRHS())) { in printMCExpr() local 2134 if (RHSC->getValue() < 0) { in printMCExpr() 2135 OS << RHSC->getValue(); in printMCExpr()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 1549 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) { in getIntrinsicInstrCost() local 1551 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(), in getIntrinsicInstrCost() 1555 APInt Exponent = RHSC->getValue().abs(); in getIntrinsicInstrCost() 1561 if (RHSC->isNegative()) in getIntrinsicInstrCost()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 7287 int64_t RHSC; in selectAddrModeUnscaled() local 7291 RHSC = RHSOp1.getCImm()->getSExtValue(); in selectAddrModeUnscaled() 7293 if (RHSC >= -256 && RHSC < 256) { in selectAddrModeUnscaled() 7297 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC); }, in selectAddrModeUnscaled() 7371 int64_t RHSC = (int64_t)RHSDef->getOperand(1).getCImm()->getZExtValue(); in selectAddrModeIndexed() local 7373 if ((RHSC & (Size - 1)) == 0 && RHSC >= 0 && RHSC < (0x1000 << Scale)) { in selectAddrModeIndexed() 7377 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); }, in selectAddrModeIndexed() 7382 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); }, in selectAddrModeIndexed()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 572 const APInt *RHSC; in matchInstruction() local 619 m_And(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction() 620 APInt Mask = ~*RHSC; in matchInstruction() 642 m_Or(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction() 643 APInt Mask = *RHSC; in matchInstruction() 673 if (match(I->getOperand(0), m_Add(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction() 674 Span = Span.subtract(*RHSC); in matchInstruction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 1384 static unsigned X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) { in X86ChooseCmpImmediateOpcode() argument 1398 return isInt<32>(RHSC->getSExtValue()) ? X86::CMP64ri32 : 0; in X86ChooseCmpImmediateOpcode() 1480 const auto *RHSC = dyn_cast<ConstantFP>(RHS); in X86SelectCmp() local 1481 if (RHSC && RHSC->isNullValue()) in X86SelectCmp()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1756 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) { in TranslateM68kCC() local 1757 if (SetCCOpcode == ISD::SETGT && RHSC->isAllOnes()) { in TranslateM68kCC() 1762 if (SetCCOpcode == ISD::SETLT && RHSC->isZero()) { in TranslateM68kCC() 1766 if (SetCCOpcode == ISD::SETLT && RHSC->getZExtValue() == 1) { in TranslateM68kCC()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
| H A D | IROutliner.cpp | 180 const ConstantInt *RHSC = cast<ConstantInt>(RHS); in getSortedConstantKeys() local 182 return LHSC->getLimitedValue() < RHSC->getLimitedValue(); in getSortedConstantKeys()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1375 if (ConstantSDNode *RHSC = isConstOrConstSplat(Op1)) { in SimplifyDemandedBits() local 1380 (~RHSC->getAPIntValue() & DemandedBits)) in SimplifyDemandedBits() 1395 LHSKnown.One == ~RHSC->getAPIntValue()) { in SimplifyDemandedBits() 5238 if (auto *RHSC = dyn_cast<ConstantSDNode>(N1)) { in SimplifySetCC() local 5244 DAG.getConstant(RHSC->getAPIntValue() - LHSR->getAPIntValue(), in SimplifySetCC() 5252 DAG.getConstant(LHSR->getAPIntValue() ^ RHSC->getAPIntValue(), in SimplifySetCC() 5262 DAG.getConstant(SUBC->getAPIntValue() - RHSC->getAPIntValue(), in SimplifySetCC() 5267 if (RHSC->getValueType(0).getSizeInBits() <= 64) in SimplifySetCC() 5268 LegalRHSImm = isLegalICmpImmediate(RHSC->getSExtValue()); in SimplifySetCC() 10478 if (ConstantSDNode *RHSC = isConstOrConstSplat(RHS)) { in expandMULO() local [all …]
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