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Searched refs:REG_WRITE (Results 1 – 7 of 7) sorted by relevance

/freebsd-14.2/sys/contrib/dev/athk/
H A Dkey.c57 REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0); in ath_hw_keyreset()
58 REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0); in ath_hw_keyreset()
59 REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0); in ath_hw_keyreset()
60 REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0); in ath_hw_keyreset()
61 REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0); in ath_hw_keyreset()
63 REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0); in ath_hw_keyreset()
64 REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0); in ath_hw_keyreset()
69 REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), 0); in ath_hw_keyreset()
75 REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry), in ath_hw_keyreset()
255 REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry), in ath_hw_set_keycache_entry()
[all …]
H A Dhw.c24 #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) macro
123 REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr)); in ath_hw_setbssidmask()
126 REG_WRITE(ah, AR_STA_ID1, id1); in ath_hw_setbssidmask()
128 REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask)); in ath_hw_setbssidmask()
129 REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4)); in ath_hw_setbssidmask()
148 REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC); in ath_hw_cycle_counters_update()
157 REG_WRITE(ah, AR_CCCNT, 0); in ath_hw_cycle_counters_update()
158 REG_WRITE(ah, AR_RFCNT, 0); in ath_hw_cycle_counters_update()
159 REG_WRITE(ah, AR_RCCNT, 0); in ath_hw_cycle_counters_update()
160 REG_WRITE(ah, AR_TFCNT, 0); in ath_hw_cycle_counters_update()
[all …]
/freebsd-14.2/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_reset.c1740 REG_WRITE(AR_SOC_RST_RESET, in ar9300_set_reset()
1742 REG_WRITE(AR_SOC_RST_RESET, in ar9300_set_reset()
1761 #undef REG_WRITE in ar9300_set_reset()
1851 #undef REG_WRITE in ar9300_set_reset()
2002 #undef REG_WRITE in ar9300_phy_disable()
3127 REG_WRITE(0xB8040000, val); in ar9300_process_ini()
3132 REG_WRITE(0xB804002c, val); in ar9300_process_ini()
3136 REG_WRITE(0xB804006c, val); in ar9300_process_ini()
3138 #undef REG_WRITE in ar9300_process_ini()
5312 #undef REG_WRITE in ar9300_reset()
[all …]
H A Dar9300_attach.c774 #define REG_WRITE(_reg, _val) *((volatile u_int32_t *)(_reg)) = (_val); in ar9300_attach() macro
786 #undef REG_WRITE in ar9300_attach()
/freebsd-14.2/sys/dev/ath/ath_hal/ar5312/
H A Dar5312reg.h30 #define REG_WRITE(_reg,_val) *((volatile uint32_t *)(_reg)) = (_val); macro
/freebsd-14.2/sys/arm/broadcom/bcm2835/
H A Dbcm2835_mbox.c59 #define REG_WRITE 0x20 /* This is Mailbox 1 address */ macro
227 mbox_write_4(sc, REG_WRITE, MBOX_MSG(chan, data)); in bcm_mbox_write()
/freebsd-14.2/sys/contrib/dev/mediatek/mt76/
H A Dmt76_connac_mcu.c2684 mt76_mcu_send_msg(dev, MCU_CE_CMD(REG_WRITE), &req, in mt76_connac_mcu_reg_wr()