Searched refs:PrefReg (Results 1 – 4 of 4) sorted by relevance
794 void setRegAllocationHint(Register VReg, unsigned Type, Register PrefReg) { in setRegAllocationHint() argument798 RegAllocHints[VReg].second.push_back(PrefReg); in setRegAllocationHint()803 void addRegAllocationHint(Register VReg, Register PrefReg) { in addRegAllocationHint() argument805 RegAllocHints[VReg].second.push_back(PrefReg); in addRegAllocationHint()810 void setSimpleHint(Register VReg, Register PrefReg) { in setSimpleHint() argument811 setRegAllocationHint(VReg, /*Type=*/0, PrefReg); in setSimpleHint()
80 PrefReg, ///< Block entry/exit prefers a register. enumerator
137 case PrefReg: in addBias()381 case PrefReg: return "PrefReg"; in print()
616 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()619 ? SpillPlacement::PrefReg in addSplitConstraints()885 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()887 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()