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Searched refs:Plan (Results 1 – 19 of 19) sorted by relevance

/freebsd-14.2/contrib/file/magic/Magdir/
H A Dplan97 0 belong 0x00000107 Plan 9 executable, Motorola 68k
8 0 belong 0x00000197 Plan 9 executable, AT&T Hobbit
9 0 belong 0x000001EB Plan 9 executable, Intel 386
10 0 belong 0x00000247 Plan 9 executable, Intel 960
11 0 belong 0x000002AB Plan 9 executable, SPARC
12 0 belong 0x00000407 Plan 9 executable, MIPS R3000
15 0 belong 0x000005AB Plan 9 executable, AMD 29000
17 0 belong 0x000006EB Plan 9 executable, PowerPC
19 0 belong 0x0000084B Plan 9 executable, DEC Alpha
24 0 belong 0x7410013C Plan 9 object file, SPARC
[all …]
H A Dcommands70 # AT&T Bell Labs' Plan 9 shell
71 0 string/fwt #!\ /bin/rc Plan 9 rc shell script text executable
H A Dwordprocessors242 # Corel Plan Perfect
245 >>>9 byte x Corel Plan Perfect: Unknown filetype %d
H A Dfilesystems45 >0 ubyte 0x39 Plan 9, or Theos spanned
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanTransforms.h33 VPInstructionsToVPRecipes(VPlanPtr &Plan,
49 static void clearReductionWrapFlags(VPlan &Plan);
60 static void optimize(VPlan &Plan, ScalarEvolution &SE);
66 static void createAndOptimizeReplicateRegions(VPlan &Plan);
76 static void addActiveLaneMask(VPlan &Plan,
83 truncateToMinimalBitwidths(VPlan &Plan,
90 static bool mergeBlocksIntoPredecessors(VPlan &Plan);
98 static void removeRedundantInductionCasts(VPlan &Plan);
102 static void removeRedundantCanonicalIVs(VPlan &Plan);
104 static void removeDeadRecipes(VPlan &Plan);
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H A DVPlanTransforms.cpp32 VPlanPtr &Plan, in VPInstructionsToVPRecipes() argument
38 Plan->getEntry()); in VPInstructionsToVPRecipes()
58 Plan->addVPValue(Phi, VPPhi); in VPInstructionsToVPRecipes()
362 addReplicateRegions(Plan); in createAndOptimizeReplicateRegions()
467 Plan.getEntry()); in removeDeadRecipes()
600 Plan.setVF(BestVF); in optimizeForVFAndUF()
601 Plan.setUF(BestUF); in optimizeForVFAndUF()
710 VPDT.recalculate(Plan); in adjustFixedOrderRecurrences()
869 Plan.getEntry()); in simplifyRecipes()
1012 optimizeInductions(Plan, SE); in optimize()
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H A DVPRecipeBuilder.h73 VFRange &Range, VPlanPtr &Plan);
79 VPlan &Plan, VFRange &Range);
85 VFRange &Range, VPlan &Plan);
92 VPlanPtr &Plan);
98 VFRange &Range, VPlanPtr &Plan);
104 VPBasicBlock *VPBB, VPlanPtr &Plan);
124 VPlanPtr &Plan);
137 void createHeaderMask(VPlan &Plan);
142 void createBlockInMask(BasicBlock *BB, VPlan &Plan);
149 VPValue *createEdgeMask(BasicBlock *Src, BasicBlock *Dst, VPlan &Plan);
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H A DVPlanHCFGBuilder.cpp43 VPlan &Plan; member in __anon2966302e0111::PlainCFGBuilder
75 : TheLoop(Lp), LI(LI), Plan(P) {} in PlainCFGBuilder()
205 RegionOfVPBB = Plan.getVectorLoopRegion(); in getOrCreateVPBB()
275 VPValue *NewVPVal = Plan.getVPValueOrAddLiveIn(IRVal); in getOrCreateVPOperand()
338 VPRegionBlock *TheRegion = Plan.getVectorLoopRegion(); in buildPlainCFG()
365 IRDef2VPValue[&I] = Plan.getVPValueOrAddLiveIn(&I); in buildPlainCFG()
430 PlainCFGBuilder PCFGBuilder(TheLoop, LI, Plan); in buildPlainCFG()
438 LLVM_DEBUG(Plan.setName("HCFGBuilder: Plain CFG\n"); dbgs() << Plan); in buildHierarchicalCFG()
440 VPRegionBlock *TopRegion = Plan.getVectorLoopRegion(); in buildHierarchicalCFG()
444 VPDomTree.recalculate(Plan); in buildHierarchicalCFG()
H A DVPlan.cpp169 Plan = ParentPlan; in setPlan()
716 Plan->TripCount = in createInitialVPlan()
723 return Plan; in createInitialVPlan()
1004 if (!Plan.getName().empty()) in dump()
1011 Plan.printLiveIns(SS); in dump()
1023 dumpBlock(Plan.getPreheader()); in dump()
1250 if (Plan.VFxUF.getNumUsers() > 0) in assignSlots()
1251 assignSlot(&Plan.VFxUF); in assignSlots()
1252 assignSlot(&Plan.VectorTripCount); in assignSlots()
1253 if (Plan.BackedgeTakenCount) in assignSlots()
[all …]
H A DVPlanVerifier.cpp233 bool VPlanVerifier::verifyPlanIsValid(const VPlan &Plan) { in verifyPlanIsValid() argument
235 VPDT.recalculate(const_cast<VPlan &>(Plan)); in verifyPlanIsValid()
237 auto Iter = vp_depth_first_deep(Plan.getEntry()); in verifyPlanIsValid()
244 const VPRegionBlock *TopRegion = Plan.getVectorLoopRegion(); in verifyPlanIsValid()
279 vp_depth_first_deep(Plan.getEntry()))) { in verifyPlanIsValid()
290 for (const auto &KV : Plan.getLiveOuts()) in verifyPlanIsValid()
H A DVPlanHCFGBuilder.h50 VPlan &Plan; variable
65 : TheLoop(Lp), LI(LI), Plan(P) {} in VPlanHCFGBuilder()
H A DLoopVectorize.cpp3335 Plan.removeLiveOut(PHI); in fixupIVUsers()
7438 [VF](const VPlanPtr &Plan) { return Plan->hasVF(VF); }) == in getBestPlanFor() argument
7443 if (Plan->hasVF(VF)) in getBestPlanFor()
7444 return *Plan.get(); in getBestPlanFor()
7671 Plan->printDOT(O); in printPlans()
7673 Plan->print(O); in printPlans()
8875 Plan->addVF(VF); in tryToBuildVPlanWithVPRecipes()
8912 return Plan; in tryToBuildVPlanWithVPRecipes()
8933 Plan->addVF(VF); in buildVPlan()
8936 Plan, in buildVPlan()
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H A DVPlanValue.h452 void assignSlots(const VPlan &Plan);
456 VPSlotTracker(const VPlan *Plan = nullptr) {
457 if (Plan)
458 assignSlots(*Plan);
H A DVPlanVerifier.h44 static bool verifyPlanIsValid(const VPlan &Plan);
H A DLoopVectorizationPlanner.h377 [&](const VPlanPtr &Plan) { return Plan->hasVF(VF); }); in hasPlanWithVF()
423 void adjustRecipesForReductions(VPBasicBlock *LatchVPBB, VPlanPtr &Plan,
H A DVPlan.h239 InnerLoopVectorizer *ILV, VPlan *Plan, LLVMContext &Ctx) in VPTransformState()
240 : VF(VF), UF(UF), LI(LI), DT(DT), Builder(Builder), ILV(ILV), Plan(Plan), in VPTransformState()
400 VPlan *Plan; member
442 VPlan *Plan = nullptr; variable
685 void fixPhi(VPlan &Plan, VPTransformState &State);
2899 const VPlan &Plan; variable
2939 : OS(O), Plan(P), SlotTracker(&P) {} in VPlanPrinter()
2957 inline raw_ostream &operator<<(raw_ostream &OS, const VPlan &Plan) {
2958 Plan.print(OS);
3069 VPInterleavedAccessInfo(VPlan &Plan, InterleavedAccessInfo &IAI);
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H A DVPlanRecipes.cpp172 void VPLiveOut::fixPhi(VPlan &Plan, VPTransformState &State) { in fixPhi() argument
178 cast<VPBasicBlock>(Plan.getVectorLoopRegion()->getSingleSuccessor()); in fixPhi()
392 auto *Plan = getParent()->getPlan(); in generateInstruction() local
393 VPRegionBlock *TopRegion = Plan->getVectorLoopRegion(); in generateInstruction()
/freebsd-14.2/contrib/tzdata/
H A Dasia3128 # "Govt Withdraws Plan To Advance Clocks"
/freebsd-14.2/contrib/byacc/
H A DCHANGES893 While, according to Plan 9 documentation, the environment variable