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Searched refs:PartTy (Results 1 – 6 of 6) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp532 const unsigned PartSize = PartTy.getSizeInBits(); in buildCopyToRegs()
534 if (PartTy.isVector() == SrcTy.isVector() && in buildCopyToRegs()
541 if (SrcTy.isVector() && !PartTy.isVector() && in buildCopyToRegs()
550 if (SrcTy.isVector() && PartTy.isVector() && in buildCopyToRegs()
552 SrcTy.getNumElements() < PartTy.getNumElements()) { in buildCopyToRegs()
559 LLT GCDTy = getGCDType(SrcTy, PartTy); in buildCopyToRegs()
560 if (GCDTy == PartTy) { in buildCopyToRegs()
568 LLT LCMTy = getCoverTy(SrcTy, PartTy); in buildCopyToRegs()
570 if (PartTy.isVector() && LCMTy == PartTy) { in buildCopyToRegs()
1006 Type *PartTy = EVT(RegVT).getTypeForEVT(Context); in getReturnInfo() local
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H A DLegalizerHelper.cpp162 LLT ResultTy, LLT PartTy, in insertParts() argument
174 if (PartTy.isVector()) in insertParts()
191 LLT GCDTy = getGCDType(getGCDType(ResultTy, LeftoverTy), PartTy); in insertParts()
4381 LLT PartTy = MRI.getType(VecParts[PartIdx]); in fewerElementsVectorExtractInsertVectorElt() local
4385 PartTy, VecParts[PartIdx], InsertVal, NewIdx); in fewerElementsVectorExtractInsertVectorElt()
4458 auto splitTypePieces = [=](LLT PartTy, SmallVectorImpl<Register> &ValRegs, in reduceLoadStoreWidth()
4461 unsigned PartSize = PartTy.getSizeInBits(); in reduceLoadStoreWidth()
4470 MF.getMachineMemOperand(&MMO, ByteOffset, PartTy); in reduceLoadStoreWidth()
4473 Register Dst = MRI.createGenericVirtualRegister(PartTy); in reduceLoadStoreWidth()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerHelper.h200 LLT PartTy, ArrayRef<Register> PartRegs,
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DSROA.cpp4484 auto *PartTy = Type::getIntNTy(LI->getContext(), PartSize * 8); in presplitLoadsAndStores() local
4488 PartTy, in presplitLoadsAndStores()
4620 auto *PartTy = Type::getIntNTy(Ty->getContext(), PartSize * 8); in presplitLoadsAndStores() local
4632 PartTy, in presplitLoadsAndStores()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp897 LLT PartTy = LLT::scalar(PartSize); in executeInWaterfallLoop() local
906 auto UnmergeOp = B.buildUnmerge(PartTy, OpReg); in executeInWaterfallLoop()
907 auto UnmergeCurrentLane = B.buildUnmerge(PartTy, CurrentLaneReg); in executeInWaterfallLoop()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3181 MVT PartTy = HaveAlign <= 8 ? MVT::getIntegerVT(8 * HaveAlign) in LowerUnalignedLoad() local
3184 allowsMemoryAccessForAlignment(Ctx, DL, PartTy, *LN->getMemOperand()); in LowerUnalignedLoad()