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Searched refs:PRIVATE_ADDRESS (Results 1 – 23 of 23) sorted by relevance

/freebsd-14.2/contrib/llvm-project/clang/lib/Basic/Targets/
H A DAMDGPU.cpp45 llvm::AMDGPUAS::PRIVATE_ADDRESS, // opencl_private
56 llvm::AMDGPUAS::PRIVATE_ADDRESS, // sycl_private
64 llvm::AMDGPUAS::PRIVATE_ADDRESS, // Default
68 llvm::AMDGPUAS::PRIVATE_ADDRESS, // opencl_private
H A DAMDGPU.h103 if (TargetAS == llvm::AMDGPUAS::PRIVATE_ADDRESS || in getPointerWidthV()
396 if (AddressSpace == llvm::AMDGPUAS::PRIVATE_ADDRESS) { in getDWARFAddressSpace()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600TargetTransformInfo.cpp53 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) in getLoadStoreVecRegBitWidth()
70 return (AddrSpace != AMDGPUAS::PRIVATE_ADDRESS); in isLegalToVectorizeMemChain()
H A DAMDGPUTargetTransformInfo.cpp185 if (AS == AMDGPUAS::PRIVATE_ADDRESS) in getUnrollingPreferences()
195 if (AS == AMDGPUAS::PRIVATE_ADDRESS) { in getUnrollingPreferences()
376 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) in getLoadStoreVecRegBitWidth()
389 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) { in isLegalToVectorizeMemChain()
917 return Load->getPointerAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS || in isSourceOfDivergence()
1062 AMDGPUAS::LOCAL_ADDRESS : AMDGPUAS::PRIVATE_ADDRESS; in rewriteIntrinsicWithAddressSpace()
1224 AMDGPUAS::PRIVATE_ADDRESS, TTI::TCK_SizeAndLatency); in adjustInliningThresholdUsingCallee()
1227 AMDGPUAS::PRIVATE_ADDRESS, TTI::TCK_SizeAndLatency); in adjustInliningThresholdUsingCallee()
1253 AddrSpace != AMDGPUAS::PRIVATE_ADDRESS) in getCallArgsTotalAllocaSize()
H A DAMDGPUTargetTransformInfo.h183 case AMDGPUAS::PRIVATE_ADDRESS: in isValidAddrSpaceCast()
215 AS != AMDGPUAS::PRIVATE_ADDRESS; in canHaveNonUndefGlobalInitializerInAddressSpace()
H A DAMDGPUAliasAnalysis.cpp70 (asB == AMDGPUAS::LOCAL_ADDRESS || asB == AMDGPUAS::PRIVATE_ADDRESS)) { in alias()
H A DR600ISelLowering.cpp1022 assert(Store->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS); in lowerPrivateTruncStore()
1055 MachinePointerInfo PtrInfo(AMDGPUAS::PRIVATE_ADDRESS); in lowerPrivateTruncStore()
1123 if ((AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::PRIVATE_ADDRESS || in LowerSTORE()
1126 if ((AS == AMDGPUAS::PRIVATE_ADDRESS) && TruncatingStore) { in LowerSTORE()
1204 if (AS != AMDGPUAS::PRIVATE_ADDRESS) in LowerSTORE()
1286 MachinePointerInfo PtrInfo(AMDGPUAS::PRIVATE_ADDRESS); in lowerPrivateExtLoad()
1324 if (AS == AMDGPUAS::PRIVATE_ADDRESS && in LowerLOAD()
1335 LoadNode->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS) && in LowerLOAD()
1393 if (LoadNode->getAddressSpace() != AMDGPUAS::PRIVATE_ADDRESS) { in LowerLOAD()
1536 if ((AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::PRIVATE_ADDRESS)) { in canMergeStoresTo()
H A DAMDGPUTargetMachine.cpp786 AddrSpace == AMDGPUAS::PRIVATE_ADDRESS || in getNullPointerValue()
824 return std::pair(II->getArgOperand(0), AMDGPUAS::PRIVATE_ADDRESS); in getPredicatedAddrSpace()
849 return AMDGPUAS::PRIVATE_ADDRESS; in getAddressSpaceForPseudoSourceKind()
H A DSIRegisterInfo.cpp813 return !TII->isLegalFLATOffset(FullOffset, AMDGPUAS::PRIVATE_ADDRESS, in needsFrameBaseReg()
897 assert(TII->isLegalFLATOffset(NewOffset, AMDGPUAS::PRIVATE_ADDRESS, in resolveFrameIndex()
928 return TII->isLegalFLATOffset(NewOffset, AMDGPUAS::PRIVATE_ADDRESS, in isFrameOffsetLegal()
1406 IsFlat ? TII->isLegalFLATOffset(MaxOffset, AMDGPUAS::PRIVATE_ADDRESS, in buildSpillLoadStore()
2282 if (TII->isLegalFLATOffset(NewOffset, AMDGPUAS::PRIVATE_ADDRESS, in eliminateFrameIndex()
H A DAMDGPUHSAMetadataStreamer.cpp92 case AMDGPUAS::PRIVATE_ADDRESS: in getAddressSpaceQualifier()
H A DAMDGPUISelDAGToDAG.cpp1457 AMDGPUTargetMachine::getNullPointerValue(AMDGPUAS::PRIVATE_ADDRESS); in SelectMUBUFScratchOffen()
1874 if (!TII->isLegalFLATOffset(COffsetVal, AMDGPUAS::PRIVATE_ADDRESS, in SelectScratchSAddr()
1878 COffsetVal, AMDGPUAS::PRIVATE_ADDRESS, SIInstrFlags::FlatScratch); in SelectScratchSAddr()
1925 if (TII->isLegalFLATOffset(COffsetVal, AMDGPUAS::PRIVATE_ADDRESS, true)) { in SelectScratchSVAddr()
1934 = TII->splitFlatOffset(COffsetVal, AMDGPUAS::PRIVATE_ADDRESS, true); in SelectScratchSVAddr()
H A DAMDGPUCallLowering.cpp115 LLT::pointer(AMDGPUAS::PRIVATE_ADDRESS, 32), FI); in getStackAddress()
198 const LLT PtrTy = LLT::pointer(AMDGPUAS::PRIVATE_ADDRESS, 32); in getStackAddress()
H A DSIISelLowering.cpp1578 if (AS == AMDGPUAS::PRIVATE_ADDRESS) in isLegalAddressingMode()
1620 } else if (AS == AMDGPUAS::PRIVATE_ADDRESS) { in canMergeStoresTo()
1755 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) { in allowsMisalignedMemoryAccessesImpl()
1832 AS == AMDGPUAS::PRIVATE_ADDRESS; in isNonGlobalAddrSpace()
6652 DestAS == AMDGPUAS::PRIVATE_ADDRESS) { in lowerADDRSPACECAST()
6670 SrcAS == AMDGPUAS::PRIVATE_ADDRESS) { in lowerADDRSPACECAST()
7180 GSD->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS) { in LowerGlobalAddress()
8266 AMDGPUAS::LOCAL_ADDRESS : AMDGPUAS::PRIVATE_ADDRESS; in LowerINTRINSIC_WO_CHAIN()
10174 if (AS == AMDGPUAS::PRIVATE_ADDRESS) { in LowerLOAD()
10739 } else if (AS == AMDGPUAS::PRIVATE_ADDRESS) { in LowerSTORE()
[all …]
H A DAMDGPUAttributor.cpp118 return SrcAS == AMDGPUAS::LOCAL_ADDRESS || SrcAS == AMDGPUAS::PRIVATE_ADDRESS; in castRequiresQueuePtr()
H A DAMDGPULegalizerInfo.cpp295 case AMDGPUAS::PRIVATE_ADDRESS: in maxSizeForAddrSpace()
633 const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS::PRIVATE_ADDRESS); in AMDGPULegalizerInfo()
2114 assert(AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::PRIVATE_ADDRESS); in getSegmentAperture()
2240 DestAS == AMDGPUAS::PRIVATE_ADDRESS)) { in legalizeAddrSpaceCast()
2266 SrcAS == AMDGPUAS::PRIVATE_ADDRESS)) { in legalizeAddrSpaceCast()
7070 return legalizeIsAddrSpace(MI, MRI, B, AMDGPUAS::PRIVATE_ADDRESS); in legalizeIntrinsic()
H A DAMDGPULibCalls.cpp1332 AMDGPULibFunc::getEPtrKindFromAddrSpace(AMDGPUAS::PRIVATE_ADDRESS); in fold_sincos()
H A DSIMemoryLegalizer.cpp711 if (AS == AMDGPUAS::PRIVATE_ADDRESS) in toSIAtomicAddrSpace()
H A DSIFrameLowering.cpp1741 if (TII->isLegalFLATOffset(MaxOffset, AMDGPUAS::PRIVATE_ADDRESS, in allocateScavengingFrameIndexesNearIncomingSP()
H A DAMDGPUInstructionSelector.cpp4522 TII.isLegalFLATOffset(ConstOffset, AMDGPUAS::PRIVATE_ADDRESS, in selectScratchSAddr()
4600 TII.isLegalFLATOffset(ConstOffset, AMDGPUAS::PRIVATE_ADDRESS, true)) { in selectScratchSVAddr()
4655 Offset != TM.getNullPointerValue(AMDGPUAS::PRIVATE_ADDRESS)) { in selectMUBUFScratchOffen()
H A DSIInsertWaitcnts.cpp2024 return AS == AMDGPUAS::PRIVATE_ADDRESS || AS == AMDGPUAS::FLAT_ADDRESS; in mayAccessScratchThroughFlat()
H A DSIInstrInfo.cpp8515 (*MI.memoperands_begin())->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS); in isStackAccess()
9458 return mmo->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS || in getGenericInstructionUniformity()
9519 return mmo->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS || in getInstructionUniformity()
H A DAMDGPURegisterBankInfo.cpp558 AS != AMDGPUAS::PRIVATE_ADDRESS) && in getInstrAlternativeMappings()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Support/
H A DAMDGPUAddrSpace.h36 PRIVATE_ADDRESS = 5, ///< Address space for private memory. enumerator