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Searched refs:PLIST (Results 1 – 19 of 19) sorted by relevance

/freebsd-14.2/sys/arm64/rockchip/clk/
H A Drk3568_cru.c165 PLIST(mux_pll_p) = { "xin24m" };
167 PLIST(mux_armclk_p) = { "apll", "gpll" };
194 PLIST(gpll_cpll_npll_p) = { "gpll", "cpll", "npll" };
195 PLIST(npll_gpll_p) = { "npll", "gpll" };
196 PLIST(cpll_gpll_p) = { "cpll", "gpll" };
197 PLIST(gpll_cpll_p) = { "gpll", "cpll" };
199 PLIST(apll_gpll_npll_p) = { "apll", "gpll", "npll" };
200 PLIST(sclk_core_pre_p) = { "sclk_core_src", "npll" };
207 PLIST(clk_ddr1x_p) = { "clk_ddrphy1x_src", "dpll" };
251 PLIST(xin24m_32k_p) = { "xin24m", "clk_rtc_32k" };
[all …]
H A Drk3399_cru.c698 PLIST(pll_src_p) = {"xin24m", "xin32k"};
706 PLIST(pll_src_cpll_gpll_p) = {"cpll", "gpll"};
728 PLIST(clk_cif_p) = {"clk_cifout_src", "xin24m"};
737 PLIST(aclk_perilp0_p) = { "cpll_aclk_perilp0_src",
740 PLIST(fclk_cm0s_p) = { "cpll_fclk_cm0s_src",
743 PLIST(hclk_perilp1_p) = { "cpll_hclk_perilp1_src",
749 PLIST(usbphy_480m_p) = { "clk_usbphy0_480m_src",
751 PLIST(aclk_gmac_p) = { "cpll_aclk_gmac_src",
753 PLIST(rmii_p) = { "clk_gmac", "clkin_gmac" };
756 PLIST(i2s0_p) = { "clk_i2s0_div", "clk_i2s0_frac",
[all …]
H A Drk3568_pmucru.c74 PLIST(mux_pll_p) = { "xin24m" };
75 PLIST(xin24m_32k_p) = { "xin24m", "clk_rtc_32k" };
76 PLIST(sclk_uart0_p) = { "sclk_uart0_div", "sclk_uart0_frac", "xin24m" };
77 PLIST(sclk_uart0_div_p) = { "ppll", "usb480m", "cpll", "gpll" };
79 PLIST(clk_usbphy0_ref_p) = { "clk_ref24m", "xin_osc0_usbphy0_g" };
80 PLIST(clk_usbphy1_ref_p) = { "clk_ref24m", "xin_osc0_usbphy1_g" };
83 PLIST(clk_wifi_p) = { "clk_wifi_osc0", "clk_wifi_div" };
84 PLIST(clk_pciephy0_ref_p) = { "clk_pciephy0_osc0", "clk_pciephy0_div" };
87 PLIST(clk_hdmi_ref_p) = { "hpll", "hpll_ph0" };
88 PLIST(clk_pdpmu_p) = { "ppll", "gpll" };
[all …]
H A Drk3288_cru.c528 PLIST(pll_src_p) = {"xin24m", "xin24m", "xin32k"};
529 PLIST(armclk_p)= {"apll_core", "gpll_core"};
530 PLIST(ddrphy_p) = {"dpll_ddr", "gpll_ddr"};
533 PLIST(cpll_gpll_p) = {"cpll", "gpll"};
534 PLIST(npll_cpll_gpll_p) = {"npll", "cpll", "gpll"};
541 PLIST(i2s_clkout_p) = {"i2s_pre", "xin12m"};
549 PLIST(vip_out_p) = {"vip_src", "xin24m"};
550 PLIST(mac_p) = {"mac_pll_src", "ext_gmac"};
551 PLIST(hsadcout_p) = {"hsadc_src", "ext_hsadc"};
552 PLIST(edp_24m_p) = {"ext_edp_24m", "xin24m"};
[all …]
H A Drk3328_cru.c640 PLIST(pll_src_p) = {"xin24m"};
641 PLIST(xin24m_rtc32k_p) = {"xin24m", "clk_rtc32k"};
643 PLIST(pll_src_cpll_gpll_p) = {"cpll", "gpll"};
644 PLIST(pll_src_cpll_gpll_apll_p) = {"cpll", "gpll", "apll"};
652 PLIST(mux_mac2io_p) = { "clk_mac2io_src", "gmac_clkin" };
653 PLIST(mux_mac2io_ext_p) = { "clk_mac2io", "gmac_clkin" };
654 PLIST(mux_mac2phy_p) = { "clk_mac2phy_src", "phy_50m_out" };
658 PLIST(mux_dclk_lcdc_p) = {"hdmiphy", "vop_dclk_src"};
659 PLIST(mux_hdmiphy_p) = {"hdmi_phy", "xin24m"};
660 PLIST(mux_usb480m_p) = {"usb480m_phy", "xin24m"};
[all …]
H A Drk3399_pmucru.c759 PLIST(xin24m_p) = {"xin24m"};
760 PLIST(xin24m_xin32k_p) = {"xin24m", "xin32k"};
761 PLIST(xin24m_ppll_p) = {"xin24m", "ppll"};
762 PLIST(uart4_p) = {"clk_uart4_c", "clk_uart4_frac", "xin24m"};
763 PLIST(wifi_p) = {"clk_wifi_c", "clk_wifi_frac"};
H A Drk_cru.h47 #define PLIST(_name) static const char *_name[] macro
/freebsd-14.2/sys/arm64/nvidia/tegra210/
H A Dtegra210_clk_per.c83 PLIST(mux_N_N_c_N_p_N_a) =
86 PLIST(mux_N_N_p_N_N_N_clkm) =
89 PLIST(mux_N_c_p_a1_c2_c3_clkm) =
102 PLIST(mux_N_c2_c_c3_p_N_a) =
130 PLIST(mux_a_audiod1_p_clkm) =
133 PLIST(mux_a_audiod2_p_clkm) =
136 PLIST(mux_a_audiod3_p_clkm) =
143 PLIST(mux_a_clks_p_clkm_e) =
162 PLIST(mux_p_N_d_N_N_d2_clkm) =
211 PLIST(mux_p_m_d_a_c_d2_clkm) =
[all …]
H A Dtegra210_clk_super.c49 #define PLIST(x) static const char *x[] macro
61 PLIST(cclk_g_parents) = {
68 PLIST(cclk_lp_parents) = {
75 PLIST(sclk_parents) = {
H A Dtegra210_car.c63 #define PLIST(x) static const char *x[] macro
186 PLIST(mux_xusb_hs) = {"xusb_ss_div2", "pllU_60", "pc_xusb_ss" };
187 PLIST(mux_xusb_ssp) = {"xusb_ss", "osc_div_clk"};
H A Dtegra210_clk_pll.c143 #define PLIST(x) static const char *x[] macro
487 PLIST(mux_pll_srcs) = {"osc_div_clk", NULL, "pllP_out0", NULL}; /* FIXME */
488 PLIST(mux_plle_src1) = {"osc_div_clk", "pllP_out0"};
489 PLIST(mux_plle_src) = {"pllE_src1", "pllREFE_out0"};
/freebsd-14.2/sys/arm/nvidia/tegra124/
H A Dtegra124_clk_per.c107 PLIST(mux_a_clks_p_clkm_e) =
110 PLIST(mux_a_c2_c_c3_p_N_clkm) =
114 PLIST(mux_m_c_p_a_c2_c3) =
130 PLIST(mux_m_c2_c_c3_p_N_a) =
137 PLIST(mux_p_N_c_N_N_N_clkm) =
140 PLIST(mux_p_N_c_N_m_N_clkm) =
143 PLIST(mux_p_c_c2_clkm) =
145 PLIST(mux_p_c2_c_c3_m) =
166 PLIST(mux_p_clkm_clks_E) =
168 PLIST(mux_p_m_d_a_c_d2_clkm) =
[all …]
H A Dtegra124_clk_super.c53 #define PLIST(x) static const char *x[] macro
67 PLIST(cclk_g_parents) = {
74 PLIST(cclk_lp_parents) = {
82 PLIST(sclk_parents) = {
H A Dtegra124_car.c62 #define PLIST(x) static const char *x[] macro
185 PLIST(mux_pll_srcs) = {"osc_div_clk", NULL, "pllP_out0", NULL}; /* FIXME */
186 PLIST(mux_plle_src1) = {"osc_div_clk", "pllP_out0"};
187 PLIST(mux_plle_src) = {"pllE_src1", "pllREFE_out"};
188 PLIST(mux_plld_out0_plld2_out0) = {"pllD_out0", "pllD2_out0"};
189 PLIST(mux_xusb_hs) = {"xusb_ss_div2", "pllU_60"};
190 PLIST(mux_xusb_ss) = {"pc_xusb_ss", "osc_div_clk"};
/freebsd-14.2/contrib/byacc/package/pkgsrc/
H A DPLIST1 @comment $NetBSD: PLIST,v 1.2 2005/04/13 14:11:54 wiz Exp $
/freebsd-14.2/release/scripts/
H A Dmake-pkg-package.sh22 -p ${WRKDIR}/.PLIST.mktmp \
/freebsd-14.2/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/
H A DAnalyses.def36 ANALYSIS_DIAGNOSTICS(PLIST, "plist", "Output analysis results using Plists",
/freebsd-14.2/contrib/byacc/
H A DMANIFEST63 package/pkgsrc/PLIST scripts from NetBSD pkgsrc, for test-builds
H A DCHANGES5486 * package/pkgsrc/PLIST: scripts from NetBSD pkgsrc, for test-builds