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Searched refs:OrigVT (Results 1 – 15 of 15) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp57 static void applyStackPassedSmallTypeDAGHack(EVT OrigVT, MVT &ValVT, in applyStackPassedSmallTypeDAGHack() argument
65 if (OrigVT == MVT::i1 || OrigVT == MVT::i8) in applyStackPassedSmallTypeDAGHack()
67 else if (OrigVT == MVT::i16) in applyStackPassedSmallTypeDAGHack()
86 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
90 applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT); in assignArg()
91 return IncomingValueAssigner::assignArg(ValNo, OrigVT, ValVT, LocVT, in assignArg()
112 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
122 applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT); in assignArg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp41 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
53 ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State); in assignArg()
69 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
81 ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State); in assignArg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp43 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
181 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2583 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in AddPromotedToType() argument
2584 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; in AddPromotedToType()
2589 void setOperationPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in setOperationPromotedToType() argument
2590 setOperationAction(Opc, OrigVT, Promote); in setOperationPromotedToType()
2591 AddPromotedToType(Opc, OrigVT, DestVT); in setOperationPromotedToType()
2593 void setOperationPromotedToType(ArrayRef<unsigned> Ops, MVT OrigVT, in setOperationPromotedToType() argument
2596 setOperationAction(Op, OrigVT, Promote); in setOperationPromotedToType()
2597 AddPromotedToType(Op, OrigVT, DestVT); in setOperationPromotedToType()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h188 virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp741 const EVT OrigVT = EVT::getEVT(Args[i].Ty); in handleAssignments() local
774 bool BigEndianPartOrdering = TLI->hasBigEndianPartOrdering(OrigVT, DL); in handleAssignments()
860 if (Handler.isIncomingArgumentHandler() && OrigVT != LocVT) { in handleAssignments()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp68 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp314 EVT OrigVT = VT; in ExpandConstantFP() local
325 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP()
326 TLI.ShouldShrinkFPConstant(OrigVT)) { in ExpandConstantFP()
341 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
347 OrigVT, dl, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
H A DLegalizeVectorTypes.cpp6790 EVT OrigVT = N->getOperand(0).getValueType(); in WidenVecOp_VECREDUCE() local
6792 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE()
6801 unsigned OrigElts = OrigVT.getVectorMinNumElements(); in WidenVecOp_VECREDUCE()
6828 EVT OrigVT = VecOp.getValueType(); in WidenVecOp_VECREDUCE_SEQ() local
6830 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE_SEQ()
6838 unsigned OrigElts = OrigVT.getVectorMinNumElements(); in WidenVecOp_VECREDUCE_SEQ()
H A DDAGCombiner.cpp12990 EVT OrigVT = N->getOperand(0).getValueType(); in CombineZExtLogicopShiftLoad() local
12991 if (TLI.isZExtFree(OrigVT, VT)) in CombineZExtLogicopShiftLoad()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp5366 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local
5367 if (OrigVT.getFixedSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
5372 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local
5373 if (OrigVT.getFixedSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp4004 static Align CalculateStackSlotAlignment(EVT ArgVT, EVT OrigVT, in CalculateStackSlotAlignment() argument
4033 if (Flags.isSplit() && OrigVT != MVT::ppcf128) in CalculateStackSlotAlignment()
4034 Alignment = Align(OrigVT.getStoreSize()); in CalculateStackSlotAlignment()
4046 static bool CalculateStackSlotUsed(EVT ArgVT, EVT OrigVT, ISD::ArgFlagsTy Flags, in CalculateStackSlotUsed() argument
4055 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in CalculateStackSlotUsed()
4448 EVT OrigVT = Ins[ArgNo].ArgVT; in LowerFormalArguments_64SVR4() local
4464 CalculateStackSlotAlignment(ObjectVT, OrigVT, Flags, PtrByteSize); in LowerFormalArguments_64SVR4()
6196 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local
6241 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in LowerCall_64SVR4()
6310 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9471 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument
9472 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits()
9473 return OrigVT; in getExtensionTo64Bits()
9475 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits()
9477 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4437 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument
4438 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits()
4439 return OrigVT; in getExtensionTo64Bits()
4441 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits()
4443 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp31699 MVT OrigVT = VT; in LowerMGATHER() local
31726 SDValue Extract = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OrigVT, in LowerMGATHER()
51586 EVT OrigVT = N->getValueType(0); in combineFneg() local
51608 return DAG.getBitcast(OrigVT, NewNode); in combineFneg()
51615 return DAG.getBitcast(OrigVT, NegArg); in combineFneg()