| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrVIS.td | 18 class VISInst<bits<9> opfval, string OpcStr, RegisterClass RC = DFPRegs>
21 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>;
24 class VISInstID<bits<9> opfval, string OpcStr>
27 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>;
36 class VISInst1<bits<9> opfval, string OpcStr, RegisterClass RC = DFPRegs>
39 !strconcat(OpcStr, " $rs1, $rd"), []>;
43 class VISInst2<bits<9> opfval, string OpcStr, RegisterClass RC = DFPRegs>
46 !strconcat(OpcStr, " $rs2, $rd"), []>;
50 class VISInstD<bits<9> opfval, string OpcStr, RegisterClass RC = DFPRegs>
53 !strconcat(OpcStr, " $rd"), []>;
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| H A D | SparcInstrInfo.td | 399 !strconcat(OpcStr, " $rs1, $rs2, $rd"),
427 !strconcat(OpcStr, " [$addr], $rd"),
432 !strconcat(OpcStr, " [$addr], $rd"),
454 Load<OpcStr, Op3Val, OpNode, RC, Ty, itin> {
455 defm A : LoadASI<OpcStr, LoadAOp3Val, RC>;
479 !strconcat(OpcStr, " $rd, [$addr]"),
484 !strconcat(OpcStr, " $rd, [$addr]"),
494 !strconcat(OpcStr, "a $rd, [$addr] $asi"),
500 !strconcat(OpcStr, "a $rd, [$addr] %asi"),
507 Store<OpcStr, Op3Val, OpNode, RC, Ty> {
[all …]
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| H A D | SparcInstrFormats.td | 235 multiclass F3_S<string OpcStr, bits<6> Op3Val, bit XVal, SDNode OpNode,
239 !strconcat(OpcStr, " $rs1, $rs2, $rd"),
243 !strconcat(OpcStr, " $rs1, $shcnt, $rd"),
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| H A D | SparcInstr64Bit.td | 357 multiclass bpr_alias<string OpcStr, Instruction NAPT, Instruction APT> {
358 def : InstAlias<!strconcat(OpcStr, ",pt $rs1, $imm16"),
360 def : InstAlias<!strconcat(OpcStr, ",a,pt $rs1, $imm16"),
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.td | 210 !strconcat(OpcStr, " $dst, $b, $c"),
227 !strconcat(OpcStr, " $dst, $b, $c"),
236 !strconcat(OpcStr, " $dst, $b, $c"),
239 class F3R_np<bits<5> opc, string OpcStr> :
241 !strconcat(OpcStr, " $dst, $b, $c"), []>;
268 !strconcat(OpcStr, " $dst, $b, $c"),
275 !strconcat(OpcStr, " $a, $b"), []>;
282 !strconcat(OpcStr, " $a, $b"), []>;
303 multiclass FU6_LU6_np<bits<10> opc, string OpcStr> {
310 class F2R_np<bits<6> opc, string OpcStr> :
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrInfo.td | 208 multiclass I3<string OpcStr, SDNode OpNode> {
211 !strconcat(OpcStr, "64 \t$dst, $a, $b;"),
215 !strconcat(OpcStr, "64 \t$dst, $a, $b;"),
235 class I16x2<string OpcStr, SDNode OpNode> :
242 // named "<OpcStr>.s32" (e.g. "addc.cc.s32").
275 multiclass F3<string OpcStr, SDNode OpNode> {
546 // instructions: <OpcStr>.f64, <OpcStr>.f32, and <OpcStr>.ftz.f32 (flush
548 multiclass F2<string OpcStr, SDNode OpNode> {
1503 multiclass BITWISE<string OpcStr, SDNode OpNode> {
1579 multiclass SHIFT<string OpcStr, SDNode OpNode> {
[all …]
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| H A D | NVPTXIntrinsics.td | 602 class F_MATH_1<string OpcStr, NVPTXRegClass target_regclass,
605 OpcStr,
611 class F_MATH_2<string OpcStr, NVPTXRegClass t_regclass,
616 OpcStr,
620 class F_MATH_3<string OpcStr, NVPTXRegClass t_regclass,
625 OpcStr,
1502 string SpaceStr, string TypeStr, string OpcStr, PatFrag IntOp,
1505 !strconcat("atom", SpaceStr, OpcStr, TypeStr, " \t$dst, [$addr], $b;"),
1514 string OpcStr, PatFrag IntOp, Operand IMMType, SDNode IMM,
1525 string SpaceStr, string TypeStr, string OpcStr, PatFrag IntOp,
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.td | 820 string OpcStr, PatFrag OpNode>
824 "$dst = atomic_fetch_"#OpcStr#"(("#OpcodeStr#" *)($addr), $val)",
838 string OpcStr, PatFrag OpNode>
842 "$dst = atomic_fetch_"#OpcStr#"(("#OpcodeStr#" *)($addr), $val)",
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| /freebsd-14.2/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaOverload.cpp | 14799 StringRef OpcStr = BinaryOperator::getOpcodeStr(Opc); in CreateOverloadedBinOp() local
14828 CandidateSet.NoteCandidates(*this, Args, Cands, OpcStr, OpLoc); in CreateOverloadedBinOp()
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