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Searched refs:Opc0 (Results 1 – 5 of 5) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineVectorOps.cpp2269 BinaryOperator::BinaryOps Opc0 = B0->getOpcode(); in foldSelectShuffle() local
2272 if (ConstantsAreOp1 && Opc0 != Opc1) { in foldSelectShuffle()
2276 if (Opc0 == Instruction::Shl || Opc1 == Instruction::Shl) in foldSelectShuffle()
2280 Opc0 = AltB0.Opcode; in foldSelectShuffle()
2289 if (Opc0 != Opc1 || !C0 || !C1) in foldSelectShuffle()
2293 BinaryOperator::BinaryOps BOpc = Opc0; in foldSelectShuffle()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp86 unsigned Opc0 = N0->getMachineOpcode(); in nodesHaveSameOperandValue() local
89 int Op0Idx = AMDGPU::getNamedOperandIdx(Opc0, OpName); in nodesHaveSameOperandValue()
241 unsigned Opc0 = Load0->getMachineOpcode(); in areLoadsFromSameBasePtr() local
245 if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad()) in areLoadsFromSameBasePtr()
249 if (!get(Opc0).getNumDefs() || !get(Opc1).getNumDefs()) in areLoadsFromSameBasePtr()
252 if (isDS(Opc0) && isDS(Opc1)) { in areLoadsFromSameBasePtr()
274 Offset0Idx -= get(Opc0).NumDefs; in areLoadsFromSameBasePtr()
281 if (isSMRD(Opc0) && isSMRD(Opc1)) { in areLoadsFromSameBasePtr()
283 if (!AMDGPU::hasNamedOperand(Opc0, AMDGPU::OpName::sbase) || in areLoadsFromSameBasePtr()
314 if ((isMUBUF(Opc0) || isMTBUF(Opc0)) && (isMUBUF(Opc1) || isMTBUF(Opc1))) { in areLoadsFromSameBasePtr()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp25337 Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25371 Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25451 Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25490 unsigned Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25529 Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25563 unsigned Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25584 Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25600 unsigned Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25825 unsigned Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
48665 unsigned Opc0 = N0.getOpcode(); in combineAnd() local
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H A DX86IntrinsicsInfo.h47 uint16_t Opc0; member
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp7496 unsigned Opc0 = N0.getOpcode(); in isBSwapHWordElement() local
7497 if (Opc0 != ISD::AND && Opc0 != ISD::SHL && Opc0 != ISD::SRL) in isBSwapHWordElement()
7504 else if (Opc0 == ISD::AND) in isBSwapHWordElement()
7518 if (Opc == ISD::SRL || (Opc == ISD::AND && Opc0 == ISD::SHL)) { in isBSwapHWordElement()
7532 if (Opc0 != ISD::SRL) in isBSwapHWordElement()
7540 if (Opc0 != ISD::SHL) in isBSwapHWordElement()
10932 unsigned Opc0 = Op0.getOpcode(); in foldABSToABD() local
10936 if (Opc0 != Op1.getOpcode() || in foldABSToABD()
10937 (Opc0 != ISD::ZERO_EXTEND && Opc0 != ISD::SIGN_EXTEND && in foldABSToABD()
10938 Opc0 != ISD::SIGN_EXTEND_INREG)) { in foldABSToABD()
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