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Searched refs:OpSize16 (Results 1 – 16 of 16) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrControl.td28 "ret{w}", []>, OpSize16;
34 "ret{w}\t$amt", []>, OpSize16;
40 "{l}ret{w|f}", []>, OpSize16;
46 "{l}ret{w|f}\t$amt", []>, OpSize16;
52 OpSize16;
66 "jmp\t$dst", []>, OpSize16;
83 []>, OpSize16, TB;
112 OpSize16, Sched<[WriteJump]>;
115 OpSize16, Sched<[WriteJumpLd]>;
146 OpSize16, Sched<[WriteJump]>, NOTRACK;
[all …]
H A DX86InstrSystem.td86 OpSize16;
105 OpSize16;
219 OpSize16;
222 OpSize16;
240 OpSize16;
243 OpSize16;
260 "str{w}\t$dst", []>, TB, OpSize16;
289 OpSize16, TB;
293 OpSize16, TB;
318 OpSize16, TB;
[all …]
H A DX86InstrExtension.td16 "{cbtw|cbw}", []>, OpSize16, Sched<[WriteALU]>;
28 "{cwtd|cwd}", []>, OpSize16, Sched<[WriteALU]>;
41 TB, OpSize16, Sched<[WriteALU]>;
45 TB, OpSize16, Sched<[WriteLoad]>;
67 TB, OpSize16, Sched<[WriteALU]>;
71 TB, OpSize16, Sched<[WriteLoad]>;
96 []>, TB, OpSize16, Sched<[WriteALU]>;
99 []>, TB, OpSize16, Sched<[WriteALU]>;
103 []>, OpSize16, TB, Sched<[WriteLoad]>;
106 []>, TB, OpSize16, Sched<[WriteLoad]>;
[all …]
H A DX86InstrMisc.td62 OpSize16;
68 OpSize16;
75 OpSize16;
82 OpSize16;
88 OpSize16;
108 OpSize16;
620 OpSize16, TB;
652 OpSize16, TB;
783 OpSize16, TB;
861 OpSize16;
[all …]
H A DX86InstrArithmetic.td20 "lea{w}\t{$src|$dst}, {$dst|$src}", []>, OpSize16;
375 def INC16r_alt : IncDec_Alt<0x40, "inc", Xi16>, OpSize16;
377 def DEC16r_alt : IncDec_Alt<0x48, "dec", Xi16>, OpSize16;
381 def INC16r : IncOpR_RF<Xi16>, OpSize16;
385 def DEC16r : DecOpR_RF<Xi16>, OpSize16;
428 def INC16m : IncOpM_MF<Xi16>, OpSize16;
431 def DEC16m : DecOpM_MF<Xi16>, OpSize16;
494 def NEG16r : NegOpR_RF<Xi16>, OpSize16;
498 def NOT16r : NotOpR_R<Xi16>, OpSize16;
521 def NEG16m : NegOpM_MF<Xi16>, OpSize16;
[all …]
H A DX86InstrCMovSetCC.td24 TB, OpSize16;
44 timm:$cond, EFLAGS))]>, TB, OpSize16;
H A DX86InstrShiftRotate.td25 def 16ri : BinOpRI8U_R<m, RegMRM, Xi16, node>, Sched<[ri]>, DefEFLAGS, OpSize16;
44 def 16mi : BinOpMI8U_M<m, MemMRM, Xi16, node>, Sched<[mi, WriteRMW]>, DefEFLAGS, OpSize16;
62 def 16r1 : UnaryOpR_RF<0xD1, RegMRM, m, Xi16>, OpSize16;
87 def 16m1 : UnaryOpM_MF<0xD1, MemMRM, m, Xi16>, OpSize16;
109 def 16rCL : BinOpRC_R<m, RegMRM, Xi16, node>, Sched<[rCL]>, OpSize16;
127 def 16mCL : BinOpMC_M<m, MemMRM, Xi16, node>, Sched<[mCL, WriteRMW]>, OpSize16;
411 def 16rri8 : ShlrdOpRRI8U_R<o1, m, Xi16, t_node>, TB, DefEFLAGS, OpSize16;
415 def 16rrCL : ShlrdOpRRC_R<o2, m, Xi16, t_node>, TB, DefEFLAGS, OpSize16;
455 def 16mri8 : ShlrdOpMRI8U_M<o1, m, Xi16, t_node>, DefEFLAGS, OpSize16;
459 def 16mrCL : ShlrdOpMRC_M<o2, m, Xi16, t_node>, DefEFLAGS, OpSize16;
H A DX86InstrTSX.td29 "xbegin\t$dst", []>, OpSize16;
H A DX86InstrCompiler.td377 [(X86rep_movs i16)]>, REP, AdSize32, OpSize16,
396 [(X86rep_movs i16)]>, REP, AdSize64, OpSize16,
418 [(X86rep_stos i16)]>, REP, AdSize32, OpSize16,
706 OpSize16, LOCK;
731 OpSize16, LOCK;
762 OpSize16, LOCK;
799 OpSize16, LOCK;
812 OpSize16, LOCK;
874 OpSize16, TB, LOCK;
892 OpSize16, TB, LOCK;
[all …]
H A DX86InstrFormats.td183 def OpSize16 : OperandSize<1>; // Needs 0x66 prefix in 32/64-bit mode.
H A DX86InstrUtils.td19 class OpSize16 { OperandSize OpSize = OpSize16; }
H A DX86InstrSSE.td5763 Sched<[WritePOPCNT]>, OpSize16, TB, XS;
5768 Sched<[WritePOPCNT.Folded]>, OpSize16, TB, XS;
6680 def CRC32r32r16 : Crc32r<Xi16, GR32, int_x86_sse42_crc32_32_16>, OpSize16;
6681 def CRC32r32m16 : Crc32m<Xi16, GR32, int_x86_sse42_crc32_32_16>, OpSize16;
/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DX86RecognizableInstr.cpp342 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
344 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
348 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32) in insnContext()
350 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
369 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
371 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
379 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16) in insnContext()
381 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
976 if (OpSize == X86Local::OpSize16) { in typeFromString()
1118 if (OpSize != X86Local::OpSize16) { in immediateEncodingFromString()
[all …]
H A DX86RecognizableInstr.h173 enum { OpSize16 = 1, OpSize32 = 2 }; enumerator
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h707 OpSize16 = 1 << OpSizeShift, enumerator
H A DX86MCCodeEmitter.cpp1430 (STI.hasFeature(X86::Is16Bit) ? X86II::OpSize32 : X86II::OpSize16)) in emitOpcodePrefix()