| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPInstrPatternsVec.td | 202 def : Pat<(OpNode 209 def : Pat<(OpNode 238 def : Pat<(OpNode 245 def : Pat<(OpNode 277 def : Pat<(OpNode 285 def : Pat<(OpNode 468 def : Pat<(OpNode 475 def : Pat<(OpNode 499 def : Pat<(OpNode 506 def : Pat<(OpNode [all …]
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| H A D | VEInstrInfo.td | 545 SDPatternOperator OpNode = null_frag, 577 SDPatternOperator OpNode = null_frag, 600 SDPatternOperator OpNode = null_frag, 616 SDPatternOperator OpNode = null_frag, 683 [(set Ty:$sx, (OpNode Ty:$sz))]>; 687 [(set Ty:$sx, (OpNode (Ty mimm:$sz)))]>; 783 [(set Tyo:$sx, (OpNode Tyi:$sy))]>; 1077 [(OpNode Ty:$sx, ADDRrri:$addr)]>; 1081 [(OpNode Ty:$sx, ADDRrii:$addr)]>; 1085 [(OpNode Ty:$sx, ADDRzri:$addr)]>; [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.h | 87 bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base, 89 bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue &Base, 91 bool SelectADDRri64(SDNode *OpNode, SDValue Addr, SDValue &Base, 93 bool SelectADDRsi_imp(SDNode *OpNode, SDValue Addr, SDValue &Base, 95 bool SelectADDRsi(SDNode *OpNode, SDValue Addr, SDValue &Base, 97 bool SelectADDRsi64(SDNode *OpNode, SDValue Addr, SDValue &Base,
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| H A D | NVPTXInstrInfo.td | 822 multiclass ADD_SUB_i1<SDNode OpNode> { 2204 : ISET_FORMAT<OpNode, Mode, 2216 : ISET_FORMAT<OpNode, Mode, 2634 [(OpNode (i32 4))]>; 2637 [(OpNode (i32 5))]>; 2641 [(OpNode (i32 6))]>; 2645 [(OpNode (i32 7))]>; 2649 [(OpNode (i32 8))]>; 3644 def : Pat<(OpNode Float32Regs:$a), 3646 def : Pat<(OpNode Float32Regs:$a), [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 7282 asm, ".8b", OpNode, v8i8>; 8824 (OpNode (v4f16 V64:$Rn), 8851 (OpNode (v2f32 V64:$Rn), 8923 def : Pat<(f16 (OpNode 8931 def : Pat<(f32 (OpNode 8937 def : Pat<(f64 (OpNode 9162 (OpNode (v4i16 V64:$Rn), 9175 (OpNode (v8i16 V128:$Rn), 9188 (OpNode (v2i32 V64:$Rn), 9200 (OpNode (v4i32 V128:$Rn), [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrAVX512.td | 1202 def : Pat <(_.VT (OpNode SrcRC:$src)), 3973 def : Pat<(_.VT (OpNode _.RC:$src0, 3984 def : Pat<(_.VT (OpNode _.RC:$src0, 6365 (_.VT (OpNode 6374 (_.VT (OpNode 6566 (OpNode _.RC:$src2, 6661 (_.VT (OpNode _.RC:$src2, 7189 (OpNode _.RC:$src2, 9716 defm NAME: avx512_trunc<opc, OpcodeStr, InVecNode, OpNode, OpNode, 9740 defm NAME: avx512_trunc<opc, OpcodeStr, InVecNode, OpNode, OpNode, [all …]
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| H A D | X86InstrFMA.td | 179 SDPatternOperator OpNode, 194 (OpNode RC:$src2, RC:$src1, (load addr:$src3)))]>, 214 (OpNode RC:$src2, (load addr:$src3), RC:$src1))]>, 244 SDPatternOperator OpNode, RegisterClass RC, 247 x86memop, RC, OpNode, sched>; 249 x86memop, RC, OpNode, sched>; 251 x86memop, RC, OpNode, sched>; 405 [(set RC:$dst, (OpNode RC:$src1, RC:$src2, 482 [(set VR128:$dst, (OpNode VR128:$src1, VR128:$src2, 509 [(set VR256:$dst, (OpNode VR256:$src1, VR256:$src2, [all …]
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| H A D | X86InstrFPStack.td | 76 multiclass FPBinary_rr<SDPatternOperator OpNode> { 80 [(set RFP32:$dst, (OpNode RFP32:$src1, RFP32:$src2))]>; 82 [(set RFP64:$dst, (OpNode RFP64:$src1, RFP64:$src2))]>; 84 [(set RFP80:$dst, (OpNode RFP80:$src1, RFP80:$src2))]>; 96 (OpNode RFP32:$src1, (loadf32 addr:$src2))), 98 (OpNode (loadf32 addr:$src2), RFP32:$src1)))]>; 103 (OpNode RFP64:$src1, (loadf64 addr:$src2))), 105 (OpNode (loadf64 addr:$src2), RFP64:$src1)))]>; 253 [(set RFP32:$dst, (OpNode RFP32:$src))]>; 255 [(set RFP64:$dst, (OpNode RFP64:$src))]>; [all …]
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| H A D | X86InstrXOP.td | 94 multiclass xop3op<bits<8> opc, string OpcodeStr, SDNode OpNode, 106 (vt128 (OpNode (vt128 VR128:$src1), 113 (vt128 (OpNode (vt128 (load addr:$src1)), 140 multiclass xop3opimm<bits<8> opc, string OpcodeStr, SDNode OpNode, 146 (vt128 (OpNode (vt128 VR128:$src1), timm:$src2)))]>, 152 (vt128 (OpNode (vt128 (load addr:$src1)), timm:$src2)))]>, 261 (vt128 (OpNode (vt128 VR128:$src1), 267 def : Pat<(OpNode (load addr:$src2), 282 multiclass xop4op<bits<8> opc, string OpcodeStr, SDNode OpNode, 289 (vt128 (OpNode (vt128 VR128:$src1), (vt128 VR128:$src2), [all …]
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| H A D | X86InstrSSE.td | 30 [(set RC:$dst, (OpNode RC:$src1, RC:$src2))], d>, 216 defm V#NAME : sse12_move_rr<OpNode, vt, OpcodeStr, 227 defm NAME : sse12_move_rr<OpNode, vt, OpcodeStr, 1853 [(set RC:$dst, (OpNode RC:$src1, 2121 (vt (OpNode RC:$src1, 2938 def : Pat<(ScalarVT (OpNode (load addr:$src))), 3586 [(set RC:$dst, (DstVT (OpNode RC:$src1, 3752 (vt128 (OpNode (memop addr:$src1), 8032 (vt128 (OpNode VR128:$src1, 8046 (vt256 (OpNode VR256:$src1, [all …]
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| H A D | X86InstrTBM.td | 20 SDNode OpNode, Operand immtype, 26 [(set RC:$dst, (OpNode RC:$src1, immoperator:$cntl))]>, 32 [(set RC:$dst, (OpNode (ld_frag addr:$src1), immoperator:$cntl))]>,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsDSPInstrInfo.td | 283 list<dag> Pattern = [(set ROD:$rd, (OpNode ROS:$rs))]; 294 list<dag> Pattern = [(OpNode ROS:$rs, ROT:$rt)]; 328 list<dag> Pattern = [(set ROD:$rd, (OpNode ROT:$rt))]; 333 class REPL_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 339 list<dag> Pattern = [(set RO:$rd, (OpNode immPat:$imm))]; 366 class LX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 477 class MULT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 505 list<dag> Pattern = [(set GPR32Opnd:$rd, (OpNode RO:$ac))]; 521 class BPOSGE32_PSEUDO_DESC_BASE<SDPatternOperator OpNode> : 1438 DSPPat<(i32 (OpNode GPR32:$rs, ACC64DSP:$ac)), [all …]
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| H A D | MipsInstrFPU.td | 112 SDPatternOperator OpNode= null_frag> : 115 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>, 121 SDPatternOperator OpNode = null_frag> { 131 [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>, 137 SDPatternOperator OpNode = null_frag> : 146 SDPatternOperator OpNode= null_frag> { 203 SDPatternOperator OpNode = null_frag> : 210 SDPatternOperator OpNode = null_frag> : 229 [(OpNode DRC:$fs, (add iPTR:$base, iPTR:$index))], Itin, 259 SDPatternOperator OpNode = null_frag> : [all …]
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| H A D | MipsMSAInstrInfo.td | 1296 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1307 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))]; 1311 class MSA_2R_FILL_PSEUDO_BASE<SDPatternOperator OpNode, 1314 [(set RCWD:$wd, (OpNode RCWS:$fs))]> { 1324 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1404 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1463 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1498 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>; 2311 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2658 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, [all …]
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| H A D | MicroMipsInstrFPU.td | 14 SDPatternOperator OpNode = null_frag> { 15 def _D32_MM : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, 20 def _D64_MM : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 { 111 SDPatternOperator OpNode = null_frag> { 112 def _D32_MM : MMRel, ABSS_FT<opstr, AFGR64Opnd, AFGR64Opnd, Itin, OpNode>, 116 def _D64_MM : StdMMR6Rel, ABSS_FT<opstr, FGR64Opnd, FGR64Opnd, Itin, OpNode>,
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| H A D | MicroMipsDSPInstrInfo.td | 179 class ABSQ_S_PH_MM_R2_DESC_BASE<string opstr, SDPatternOperator OpNode, 185 list<dag> Pattern = [(set ROD:$rt, (OpNode ROS:$rs))]; 215 class SHLL_R2_MM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 221 list<dag> Pattern = [(set RO:$rt, (OpNode RO:$rs, ImmPat:$sa))]; 252 class SHLLV_R3_MM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 257 list<dag> Pattern = [(set RO:$rd, (OpNode RO:$rt, GPR32Opnd:$rs))]; 325 class MFHI_MM_DESC_BASE<string instr_asm, RegisterOperand RO, SDNode OpNode, 330 list<dag> Pattern = [(set GPR32Opnd:$rs, (OpNode RO:$ac))];
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| H A D | MipsInstrInfo.td | 1320 SDPatternOperator OpNode = null_frag>: 1333 SDPatternOperator OpNode = null_frag> : 1387 SDPatternOperator OpNode = null_frag, 1400 LoadMemory<opstr, RO, mem, OpNode, Itin, Addr>; 1403 SDPatternOperator OpNode = null_frag, 1415 StoreMemory<opstr, RO, MO, OpNode, Itin, Addr>; 1432 [(OpNode RO:$rt, addr:$addr)], Itin, FrmI> { 1439 SDPatternOperator OpNode= null_frag> : 1448 SDPatternOperator OpNode= null_frag> : 1458 SDPatternOperator OpNode= null_frag> : [all …]
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| H A D | MipsCondMov.td | 36 SDPatternOperator OpNode = null_frag> : 39 [(set RC:$rd, (OpNode RC:$rs, FCCRegsOpnd:$fcc, RC:$F))], 46 SDPatternOperator OpNode = null_frag> : 49 [(set RC:$fd, (OpNode RC:$fs, FCCRegsOpnd:$fcc, RC:$F))],
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.td | 302 [(set GPR:$dst, (OpNode i64:$src2, i64:$src))]>; 312 [(set GPR32:$dst, (OpNode i32:$src2, i32:$src))]>; 473 class STOREi64<BPFWidthModifer Opc, string OpcodeStr, PatFrag OpNode> 474 : STORE<Opc, OpcodeStr, [(OpNode GPR:$src, ADDRri:$addr)]>; 749 class XADD<BPFWidthModifer SizeOp, string OpcodeStr, PatFrag OpNode> 820 string OpcStr, PatFrag OpNode> 838 string OpcStr, PatFrag OpNode> 877 class XCHG<BPFWidthModifer SizeOp, string OpcodeStr, PatFrag OpNode> 925 [(set R0, (OpNode ADDRri:$addr, R0, GPR:$new))]> { 1018 [(set R0, (OpNode GPR:$skb, GPR:$val))]> { [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchLASXInstrInfo.td | 1088 multiclass PatXr<SDPatternOperator OpNode, string Inst> { 1089 def : Pat<(v32i8 (OpNode (v32i8 LASX256:$xj))), 1091 def : Pat<(v16i16 (OpNode (v16i16 LASX256:$xj))), 1093 def : Pat<(v8i32 (OpNode (v8i32 LASX256:$xj))), 1095 def : Pat<(v4i64 (OpNode (v4i64 LASX256:$xj))), 1099 multiclass PatXrF<SDPatternOperator OpNode, string Inst> { 1100 def : Pat<(v8f32 (OpNode (v8f32 LASX256:$xj))), 1102 def : Pat<(v4f64 (OpNode (v4f64 LASX256:$xj))), 1106 multiclass PatXrXr<SDPatternOperator OpNode, string Inst> { 1117 multiclass PatXrXrF<SDPatternOperator OpNode, string Inst> { [all …]
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| H A D | LoongArchLSXInstrInfo.td | 34 class VecCond<SDPatternOperator OpNode, ValueType TyNode, 37 [(set GPR:$rd, (OpNode (TyNode RC:$vj)))]> { 1192 multiclass PatVr<SDPatternOperator OpNode, string Inst> { 1193 def : Pat<(v16i8 (OpNode (v16i8 LSX128:$vj))), 1195 def : Pat<(v8i16 (OpNode (v8i16 LSX128:$vj))), 1197 def : Pat<(v4i32 (OpNode (v4i32 LSX128:$vj))), 1199 def : Pat<(v2i64 (OpNode (v2i64 LSX128:$vj))), 1203 multiclass PatVrF<SDPatternOperator OpNode, string Inst> { 1204 def : Pat<(v4f32 (OpNode (v4f32 LSX128:$vj))), 1206 def : Pat<(v2f64 (OpNode (v2f64 LSX128:$vj))), [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.td | 287 multiclass ALUarith<bits<3> subOp, string AsmStr, SDNode OpNode, 295 [(set GPR:$Rd, (OpNode GPR:$Rs1, GPR:$Rs2))]>; 298 multiclass ALUlogic<bits<3> subOp, string AsmStr, SDNode OpNode, 479 class LoadRR<string OpcString, PatFrag OpNode, ValueType Ty> 482 [(set (Ty GPR:$Rd), (OpNode ADDRrr:$src))]>, 495 class LoadRI<string OpcString, PatFrag OpNode, ValueType Ty> 498 [(set (Ty GPR:$Rd), (OpNode ADDRri:$src))]>, 597 class StoreRR<string OpcString, PatFrag OpNode, ValueType Ty> 600 [(OpNode (Ty GPR:$Rd), ADDRrr:$dst)]>, 614 class StoreRI<string OpcString, PatFrag OpNode, ValueType Ty> [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrNEON.td | 2976 (OpNode (TyQ QPR:$src1), 2988 (OpNode (TyQ QPR:$src1), 2997 SDNode OpNode> 3071 (TyQ (OpNode (TyD DPR:$Vn), 3080 (TyQ (OpNode (TyD DPR:$Vn), 3455 SDNode OpNode> { 3710 SDNode OpNode> { 7405 : NEONFPPat<(f32 (OpNode SPR:$a)), 7449 : NEONFPPat<(f32 (OpNode GPR:$a)), 7457 : NEONFPPat<(i32 (OpNode SPR:$a)), [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.td | 211 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>; 225 SDNode OpNode> { 234 class F3R<bits<5> opc, string OpcStr, SDNode OpNode> : 237 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>; 246 SDNode OpNode> { 257 SDNode OpNode> { 266 class FL3R<bits<9> opc, string OpcStr, SDNode OpNode> : 269 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>; 289 multiclass FU6_LU6<bits<10> opc, string OpcStr, SDNode OpNode> { 291 [(OpNode immU6:$a)]>; [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoF.td | 480 class PatSetCC<DAGOperand Ty, SDPatternOperator OpNode, CondCode Cond, 482 : Pat<(XLenVT (OpNode (vt Ty:$rs1), Ty:$rs2, Cond)), (Inst $rs1, $rs2)>; 483 multiclass PatSetCC_m<SDPatternOperator OpNode, CondCode Cond, 486 def Ext.Suffix : PatSetCC<Ext.PrimaryTy, OpNode, Cond, 490 class PatFprFpr<SDPatternOperator OpNode, RVInstR Inst, 492 : Pat<(OpNode (vt RegTy:$rs1), (vt RegTy:$rs2)), (Inst $rs1, $rs2)>; 493 multiclass PatFprFpr_m<SDPatternOperator OpNode, RVInstR Inst, 496 def Ext.Suffix : PatFprFpr<OpNode, !cast<RVInstR>(Inst#Ext.Suffix), 500 class PatFprFprDynFrm<SDPatternOperator OpNode, RVInstRFrm Inst, 503 multiclass PatFprFprDynFrm_m<SDPatternOperator OpNode, RVInstRFrm Inst, [all …]
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