Home
last modified time | relevance | path

Searched refs:OpName (Results 1 – 25 of 88) sorted by relevance

1234

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp235 {R600::OpName::src0, R600::OpName::src0_sel}, in getSelIdx()
236 {R600::OpName::src1, R600::OpName::src1_sel}, in getSelIdx()
237 {R600::OpName::src2, R600::OpName::src2_sel}, in getSelIdx()
238 {R600::OpName::src0_X, R600::OpName::src0_sel_X}, in getSelIdx()
239 {R600::OpName::src0_Y, R600::OpName::src0_sel_Y}, in getSelIdx()
240 {R600::OpName::src0_Z, R600::OpName::src0_sel_Z}, in getSelIdx()
241 {R600::OpName::src0_W, R600::OpName::src0_sel_W}, in getSelIdx()
245 {R600::OpName::src1_W, R600::OpName::src1_sel_W} in getSelIdx()
286 {R600::OpName::src0, R600::OpName::src0_sel}, in getSrcs()
287 {R600::OpName::src1, R600::OpName::src1_sel}, in getSrcs()
[all …]
H A DSIPeepholeSDWA.cpp347 TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers); in convertToSDWA()
351 Src = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in convertToSDWA()
352 SrcSel = TII->getNamedOperand(MI, AMDGPU::OpName::src1_sel); in convertToSDWA()
365 TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused); in convertToSDWA()
727 OrSDWA = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand()
902 .add(*TII->getNamedOperand(MI, AMDGPU::OpName::vdst)) in pseudoOpConvertToVOP2()
903 .add(*TII->getNamedOperand(MI, AMDGPU::OpName::src0)) in pseudoOpConvertToVOP2()
904 .add(*TII->getNamedOperand(MI, AMDGPU::OpName::src1)) in pseudoOpConvertToVOP2()
940 (TII->hasModifiersSet(MI, AMDGPU::OpName::clamp) || in isConvertibleToSDWA()
941 TII->hasModifiersSet(MI, AMDGPU::OpName::omod))) in isConvertibleToSDWA()
[all …]
H A DGCNDPPCombine.cpp140 if (!hasNoImmOrEqual(MI, AMDGPU::OpName::src0_modifiers, 0, Mask) || in isShrinkable()
141 !hasNoImmOrEqual(MI, AMDGPU::OpName::src1_modifiers, 0, Mask) || in isShrinkable()
142 !hasNoImmOrEqual(MI, AMDGPU::OpName::clamp, 0) || in isShrinkable()
143 !hasNoImmOrEqual(MI, AMDGPU::OpName::omod, 0)) { in isShrinkable()
289 auto *Src0 = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0); in createDPPInst()
313 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); in createDPPInst()
343 auto *Src2 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src2); in createDPPInst()
362 AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::vdst_in)) { in createDPPInst()
385 if (AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::op_sel)) in createDPPInst()
486 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); in createDPPInst()
[all …]
H A DR600ExpandSpecialInstrs.cpp86 int DstIdx = TII->getOperandIdx(MI.getOpcode(), R600::OpName::dst); in runOnMachineFunction()
93 R600::OpName::pred_sel); in runOnMachineFunction()
95 R600::OpName::pred_sel); in runOnMachineFunction()
117 TII->setImmOperand(*PredSet, R600::OpName::update_pred, 1); in runOnMachineFunction()
204 int Src1Idx = TII->getOperandIdx(MI, R600::OpName::src1); in runOnMachineFunction()
262 SetFlagInNewMI(NewMI, &MI, R600::OpName::clamp); in runOnMachineFunction()
263 SetFlagInNewMI(NewMI, &MI, R600::OpName::literal); in runOnMachineFunction()
264 SetFlagInNewMI(NewMI, &MI, R600::OpName::src0_abs); in runOnMachineFunction()
265 SetFlagInNewMI(NewMI, &MI, R600::OpName::src1_abs); in runOnMachineFunction()
266 SetFlagInNewMI(NewMI, &MI, R600::OpName::src0_neg); in runOnMachineFunction()
[all …]
H A DR600ClauseMergePass.cpp79 .getOperand(TII->getOperandIdx(MI.getOpcode(), R600::OpName::COUNT)) in getCFAluSize()
86 .getOperand(TII->getOperandIdx(MI.getOpcode(), R600::OpName::Enabled)) in isCFAluEnabled()
92 int CntIdx = TII->getOperandIdx(R600::CF_ALU, R600::OpName::COUNT); in cleanPotentialDisabledCFAlu()
111 int CntIdx = TII->getOperandIdx(R600::CF_ALU, R600::OpName::COUNT); in mergeIfPossible()
123 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_MODE0); in mergeIfPossible()
125 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_BANK0); in mergeIfPossible()
127 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_ADDR0); in mergeIfPossible()
139 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_MODE1); in mergeIfPossible()
141 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_BANK1); in mergeIfPossible()
143 TII->getOperandIdx(R600::CF_ALU, R600::OpName::KCACHE_ADDR1); in mergeIfPossible()
H A DSILoadStoreOptimizer.cpp638 TII.isMIMG(Opc) ? AMDGPU::OpName::srsrc : AMDGPU::OpName::rsrc; in getRegs()
786 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::addr); in setMI()
792 Opc, isVIMAGEorVSAMPLE ? AMDGPU::OpName::rsrc : AMDGPU::OpName::srsrc); in setMI()
804 Opc, isVIMAGEorVSAMPLE ? AMDGPU::OpName::samp : AMDGPU::OpName::ssamp); in setMI()
894 unsigned OperandsToMatch[] = {AMDGPU::OpName::cpol, AMDGPU::OpName::d16, in dmasksCanBeCombined()
895 AMDGPU::OpName::unorm, AMDGPU::OpName::da, in dmasksCanBeCombined()
896 AMDGPU::OpName::r128, AMDGPU::OpName::a16}; in dmasksCanBeCombined()
1297 TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeWrite2Pair()
1299 TII->getNamedOperand(*CI.I, AMDGPU::OpName::data0); in mergeWrite2Pair()
1301 TII->getNamedOperand(*Paired.I, AMDGPU::OpName::data0); in mergeWrite2Pair()
[all …]
H A DR600Packetizer.cpp81 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::write); in getPreviousVector()
84 int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst); in getPreviousVector()
126 R600::OpName::src0, in substitutePV()
127 R600::OpName::src1, in substitutePV()
128 R600::OpName::src2 in substitutePV()
182 int OpI = TII->getOperandIdx(MII->getOpcode(), R600::OpName::pred_sel), in isLegalToPacketizeTogether()
183 OpJ = TII->getOperandIdx(MIJ->getOpcode(), R600::OpName::pred_sel); in isLegalToPacketizeTogether()
217 unsigned LastOp = TII->getOperandIdx(MI->getOpcode(), R600::OpName::last); in setIsLastBit()
298 R600::OpName::bank_swizzle); in addToPacket()
302 TII->getOperandIdx(MI.getOpcode(), R600::OpName::bank_swizzle); in addToPacket()
H A DSIFoldOperands.cpp251 ModIdx = AMDGPU::OpName::src0_modifiers; in tryFoldImmWithOpSel()
254 ModIdx = AMDGPU::OpName::src1_modifiers; in tryFoldImmWithOpSel()
257 ModIdx = AMDGPU::OpName::src2_modifiers; in tryFoldImmWithOpSel()
819 AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::vaddr) && in foldOperand()
820 !AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::saddr)) { in foldOperand()
1517 if (TII->hasModifiersSet(MI, AMDGPU::OpName::omod)) in isClamp()
1655 TII->hasModifiersSet(MI, AMDGPU::OpName::omod) || in isOMod()
1656 TII->hasModifiersSet(MI, AMDGPU::OpName::clamp)) in isOMod()
1684 !TII->hasModifiersSet(MI, AMDGPU::OpName::clamp) && in isOMod()
1685 !TII->hasModifiersSet(MI, AMDGPU::OpName::omod)) in isOMod()
[all …]
H A DSIInstrInfo.cpp89 int Op0Idx = AMDGPU::getNamedOperandIdx(Opc0, OpName); in nodesHaveSameOperandValue()
90 int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName); in nodesHaveSameOperandValue()
444 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandsWithOffsetWidth()
3341 AMDGPU::OpName::src0_modifiers, AMDGPU::OpName::src1_modifiers,
3342 AMDGPU::OpName::src2_modifiers, AMDGPU::OpName::clamp,
3343 AMDGPU::OpName::omod, AMDGPU::OpName::op_sel};
5023 isMIMG(MI) ? AMDGPU::OpName::srsrc : AMDGPU::OpName::rsrc; in verifyInstruction()
5174 if (!isAlignedReg(AMDGPU::OpName::data0)) { in verifyInstruction()
5182 if (!isAlignedReg(AMDGPU::OpName::vaddr)) { in verifyInstruction()
5677 isDS(Opc) ? AMDGPU::OpName::data0 : AMDGPU::OpName::vdata); in isOperandLegal()
[all …]
H A DR600ISelLowering.cpp294 TII->setImmOperand(*NewMI, R600::OpName::src0_sel, in EmitInstrWithCustomInserter()
1979 TII->getOperandIdx(Opcode, R600::OpName::src0), in FoldOperand()
1980 TII->getOperandIdx(Opcode, R600::OpName::src1), in FoldOperand()
1981 TII->getOperandIdx(Opcode, R600::OpName::src2), in FoldOperand()
1982 TII->getOperandIdx(Opcode, R600::OpName::src0_X), in FoldOperand()
1983 TII->getOperandIdx(Opcode, R600::OpName::src0_Y), in FoldOperand()
1989 TII->getOperandIdx(Opcode, R600::OpName::src1_W) in FoldOperand()
2093 TII->getOperandIdx(Opcode, R600::OpName::src1_W) in PostISelFolding()
2139 TII->getOperandIdx(Opcode, R600::OpName::src0), in PostISelFolding()
2140 TII->getOperandIdx(Opcode, R600::OpName::src1), in PostISelFolding()
[all …]
H A DGCNHazardRecognizer.cpp155 AMDGPU::OpName::gds); in isSendMsgTraceDataOrGDS()
831 TII->getNamedOperand(MI, AMDGPU::OpName::soffset); in createsVALUHazard()
1054 TII->getNamedOperand(*RWLane, AMDGPU::OpName::src1); in checkRWLaneHazards()
1133 auto *Src0 = TII->getNamedOperand(*MI, AMDGPU::OpName::src0); in fixVcmpxPermlaneHazards()
1203 SDSTName = AMDGPU::OpName::vdst; in fixSMEMtoVectorWriteHazards()
1206 SDSTName = AMDGPU::OpName::sdst; in fixSMEMtoVectorWriteHazards()
1299 if (TII->getNamedOperand(MI, AMDGPU::OpName::sdst)) in fixVcmpxExecWARHazard()
1443 TII.getNamedOperand(*MI, AMDGPU::OpName::waitvdst); in fixLdsDirectVALUHazard()
1737 TII->getNamedOperand(I, AMDGPU::OpName::vdst)->getReg(); in fixWMMAHazards()
1747 TII->getNamedOperand(*MI, AMDGPU::OpName::src2); in fixWMMAHazards()
[all …]
H A DVOPInstructions.td49 string OpName = opName;
808 VOP <OpName>,
829 string Mnemonic = OpName;
846 let PseudoInstr = OpName#"_e64"#"_dpp";
889 class VOP_DPP_Base <string OpName, VOPProfile P,
921 VOP_DPP_Base<OpName, P, InsDPP, AsmDPP> {
1001 class VOP_DPP8<string OpName, VOPProfile P> :
1002 VOP_DPP8_Base<OpName, P>, VOP_DPP8e<P>;
1282 VOP3_Pseudo<OpName, P,
1308 def _e64 : VOP3InstBase<OpName, P, node>;
[all …]
H A DVOPCInstructions.td186 VOP_SDWA_Pseudo <OpName, P, pattern> {
1195 : VOP_DPP8_Base<OpName, P, P.InsDPP8, " " #P.AsmDPP8>,
1223 string opName = ps.OpName>
1273 string opName = ps.OpName>
1280 string opName = ps.OpName>
1416 defvar ps32 = !cast<VOPC_Pseudo>(OpName#"_e32");
1417 defvar ps64 = !cast<VOP3_Pseudo>(OpName#"_e64");
1669 string OpName = NAME, string pseudo_mnemonic = ""> :
1673 string OpName = NAME, string pseudo_mnemonic = ""> :
1678 string OpName = NAME, string pseudo_mnemonic = ""> :
[all …]
H A DSIOptimizeExecMaskingPreRA.cpp154 MachineOperand *Op1 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src0); in optimizeVcndVcmpPair()
155 MachineOperand *Op2 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src1); in optimizeVcndVcmpPair()
169 if (TII->hasModifiersSet(*Sel, AMDGPU::OpName::src0_modifiers) || in optimizeVcndVcmpPair()
170 TII->hasModifiersSet(*Sel, AMDGPU::OpName::src1_modifiers)) in optimizeVcndVcmpPair()
173 Op1 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src0); in optimizeVcndVcmpPair()
174 Op2 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src1); in optimizeVcndVcmpPair()
175 MachineOperand *CC = TII->getNamedOperand(*Sel, AMDGPU::OpName::src2); in optimizeVcndVcmpPair()
H A DSIOptimizeExecMasking.cpp583 MachineOperand *Src0 = TII->getNamedOperand(VCmp, AMDGPU::OpName::src0); in optimizeVCMPSaveExecSequence()
584 MachineOperand *Src1 = TII->getNamedOperand(VCmp, AMDGPU::OpName::src1); in optimizeVCMPSaveExecSequence()
608 TryAddImmediateValueFromNamedOperand(AMDGPU::OpName::src0_modifiers); in optimizeVCMPSaveExecSequence()
611 TryAddImmediateValueFromNamedOperand(AMDGPU::OpName::src1_modifiers); in optimizeVCMPSaveExecSequence()
614 TryAddImmediateValueFromNamedOperand(AMDGPU::OpName::clamp); in optimizeVCMPSaveExecSequence()
653 MachineOperand *SaveExecSrc0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in tryRecordVCmpxAndSaveexecSequence()
677 MachineOperand *VCmpDest = TII->getNamedOperand(*VCmp, AMDGPU::OpName::sdst); in tryRecordVCmpxAndSaveexecSequence()
681 MachineOperand *Src0 = TII->getNamedOperand(*VCmp, AMDGPU::OpName::src0); in tryRecordVCmpxAndSaveexecSequence()
686 MachineOperand *Src1 = TII->getNamedOperand(*VCmp, AMDGPU::OpName::src1); in tryRecordVCmpxAndSaveexecSequence()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp745 AMDGPU::OpName::cpol); in getInstruction()
827 AMDGPU::OpName::vdst_in); in getInstruction()
881 AMDGPU::OpName::sdst); in convertSDWAInst()
904 const int ModOps[] = {AMDGPU::OpName::src0_modifiers, in collectVOPModifiers()
984 AMDGPU::OpName::op_sel); in convertDPP8Inst()
1020 AMDGPU::OpName::op_sel); in convertVOP3DPPInst()
1191 AMDGPU::OpName::op_sel); in convertVOP3PDPPInst()
1195 AMDGPU::OpName::op_sel_hi); in convertVOP3PDPPInst()
1199 AMDGPU::OpName::neg_lo); in convertVOP3PDPPInst()
1203 AMDGPU::OpName::neg_hi); in convertVOP3PDPPInst()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DGlobalISelCombinerEmitter.cpp452 if (!AllowSelf && *It == OpName) in inferNamedOperandType()
561 errs() << Sep << OpName; in getInstEqClasses()
1627 if (OpName) in parseInstructionPatternOperand()
1634 std::string Name = OpName ? OpName->getAsUnquotedString() : ""; in parseInstructionPatternOperand()
1661 std::string Name = OpName ? OpName->getAsUnquotedString() : ""; in parseInstructionPatternOperand()
1668 if (!OpName) { in parseInstructionPatternOperand()
2482 const auto OpName = in emitCodeGenInstructionMatchPattern() local
2486 if (!OpName.empty()) in emitCodeGenInstructionMatchPattern()
2504 if (OpName.empty() || in emitCodeGenInstructionMatchPattern()
2525 assert(!OpName.empty()); in emitCodeGenInstructionMatchPattern()
[all …]
H A DSubtargetFeatureInfo.cpp145 StringRef OpName = Op->getDef()->getName(); in emitFeaturesAux() local
146 if (OpName == "not" && D->getNumArgs() == 1) { in emitFeaturesAux()
150 if ((OpName == "any_of" || OpName == "all_of") && D->getNumArgs() > 0) { in emitFeaturesAux()
154 ListSeparator LS(OpName == "any_of" ? " || " : " && "); in emitFeaturesAux()
H A DCodeGenInstruction.cpp239 StringRef OpName = Op.substr(1); in ParseOperandName() local
243 StringRef::size_type DotIdx = OpName.find_first_of('.'); in ParseOperandName()
245 SubOpName = OpName.substr(DotIdx+1); in ParseOperandName()
250 OpName = OpName.substr(0, DotIdx); in ParseOperandName()
255 if (std::pair<unsigned, unsigned> SubOp; hasSubOperandAlias(OpName, SubOp)) { in ParseOperandName()
262 OpName + "'"); in ParseOperandName()
267 OpIdx = getOperandNamed(OpName); in ParseOperandName()
414 StringRef OpName; in ProcessDisableEncoding() local
415 std::tie(OpName, DisableEncoding) = getToken(DisableEncoding, " ,\t"); in ProcessDisableEncoding()
416 if (OpName.empty()) break; in ProcessDisableEncoding()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/
H A DPatterns.cpp52 PatternType PatternType::getTypeOf(StringRef OpName) { in getTypeOf() argument
54 PT.Data.Str = OpName; in getTypeOf()
266 StringRef OpName = Op.getOperandName(); in addPattern() local
275 auto &Def = Table[OpName]; in addPattern()
281 DiagnoseRedef(OpName); in addPattern()
410 StringRef OpName = Op.getOperandName(); in check() local
411 auto &Info = Types[OpName]; in check()
414 Info.PrintTypeSrcNote = [this, OpName, Ty, &P]() { in check()
415 PrintSeenWithTypeIn(P, OpName, Ty); in check()
424 PrintSeenWithTypeIn(P, OpName, Ty); in check()
[all …]
/freebsd-14.2/contrib/llvm-project/clang/lib/Tooling/Transformer/
H A DParsing.cpp251 std::string OpName = std::move(Id->Value); in parseRangeSelectorImpl() local
252 if (auto Op = findOptional(getUnaryStringSelectors(), OpName)) in parseRangeSelectorImpl()
255 if (auto Op = findOptional(getUnaryRangeSelectors(), OpName)) in parseRangeSelectorImpl()
258 if (auto Op = findOptional(getBinaryStringSelectors(), OpName)) in parseRangeSelectorImpl()
261 if (auto Op = findOptional(getBinaryRangeSelectors(), OpName)) in parseRangeSelectorImpl()
264 return makeParseError(State, "unknown selector name: " + OpName); in parseRangeSelectorImpl()
H A DStencil.cpp120 StringRef OpName; in toString() local
123 OpName = "expression"; in toString()
126 OpName = "deref"; in toString()
129 OpName = "maybeDeref"; in toString()
132 OpName = "addressOf"; in toString()
135 OpName = "maybeAddressOf"; in toString()
138 OpName = "describe"; in toString()
141 return (OpName + "(\"" + Id + "\")").str(); in toString()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4179 for (auto SrcName : {OpName::src0, OpName::src1, OpName::src2}) { in validateLdsDirect()
4192 if (SrcName != OpName::src0) in validateLdsDirect()
4393 assert(OpName == AMDGPU::OpName::neg_lo || OpName == AMDGPU::OpName::neg_hi); in validateNeg()
8171 const int Ops[] = { AMDGPU::OpName::src0, in cvtVOP3DstOpSelOnly()
8172 AMDGPU::OpName::src1, in cvtVOP3DstOpSelOnly()
8173 AMDGPU::OpName::src2 }; in cvtVOP3DstOpSelOnly()
8284 const int Ops[] = { AMDGPU::OpName::src0, in cvtVINTERP()
8285 AMDGPU::OpName::src1, in cvtVINTERP()
8286 AMDGPU::OpName::src2 }; in cvtVINTERP()
8410 const int Ops[] = { AMDGPU::OpName::src0, in cvtVOP3P()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.cpp306 using namespace AMDGPU::OpName; in getImplicitOpSelHiEncoding()
361 AMDGPU::OpName::vaddr0); in encodeInstruction()
363 AMDGPU::OpName::srsrc); in encodeInstruction()
381 if (AMDGPU::hasNamedOperand(MI.getOpcode(), AMDGPU::OpName::imm)) in encodeInstruction()
581 AMDGPU::OpName::src0_modifiers)) { in getMachineOpValueT16()
582 SrcMOIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0); in getMachineOpValueT16()
584 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vdst); in getMachineOpValueT16()
591 MI.getOpcode(), AMDGPU::OpName::src1_modifiers)) in getMachineOpValueT16()
592 SrcMOIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src1); in getMachineOpValueT16()
594 MI.getOpcode(), AMDGPU::OpName::src2_modifiers)) in getMachineOpValueT16()
[all …]
H A DAMDGPUInstPrinter.cpp326 AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::format); in printSymbolicFormat()
889 AMDGPU::OpName::src1)) in printRegularOperand()
1182 int EnIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::en); in printExpSrcN()
1185 int ComprIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::compr); in printExpSrcN()
1264 {AMDGPU::OpName::src0_modifiers, AMDGPU::OpName::src0}, in printPackedModifier()
1265 {AMDGPU::OpName::src1_modifiers, AMDGPU::OpName::src1}, in printPackedModifier()
1266 {AMDGPU::OpName::src2_modifiers, AMDGPU::OpName::src2}}; in printPackedModifier()
1284 for (int OpName : in printPackedModifier()
1285 {AMDGPU::OpName::src0_modifiers, AMDGPU::OpName::src1_modifiers, in printPackedModifier()
1286 AMDGPU::OpName::src2_modifiers}) { in printPackedModifier()
[all …]

1234