| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 163 buildMI(MBB, MBBI, OpLo) in expandArith()
373 buildMI(MBB, MBBI, OpLo) in expand()
430 unsigned OpLo = AVR::COMRd; in expand() local
435 buildMI(MBB, MBBI, OpLo) in expand()
502 unsigned OpLo = AVR::CPRdRr; in expand() local
508 buildMI(MBB, MBBI, OpLo) in expand()
567 unsigned OpLo = AVR::LDIRdK; in expand() local
572 buildMI(MBB, MBBI, OpLo) in expand()
1454 buildMI(MBB, MBBI, OpLo) in expand()
1573 buildMI(MBB, MBBI, OpLo) in expand()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 1961 const MachineOperand &OpLo = LoIs1 ? MI.getOperand(1) : MI.getOperand(3); in evaluate() local
1964 RegisterSubReg SrcRL(OpLo), SrcRH(OpHi); in evaluate()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 2396 MachineOperand OpLo = MI.getOperand(1); in expandPostRAPseudo() local
2422 if (OpLo.isGlobal()) in expandPostRAPseudo()
2423 OpLo.setOffset(OpLo.getOffset() + Adjust + 4); in expandPostRAPseudo()
2425 BuildMI(MF, DL, get(AMDGPU::S_ADD_U32), RegLo).addReg(RegLo).add(OpLo)); in expandPostRAPseudo()
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| H A D | SIISelLowering.cpp | 5455 SDValue OpLo = DAG.getNode(Opc, SL, Lo.getValueType(), Lo, in splitUnaryVectorOp() local
5460 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitUnaryVectorOp()
5481 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, in splitBinaryVectorOp() local
5486 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitBinaryVectorOp()
5513 SDValue OpLo = DAG.getNode(Opc, SL, ResVT.first, Lo0, Lo1, Lo2, in splitTernaryVectorOp() local
5518 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitTernaryVectorOp()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1633 SDValue OpLo = Op; in SplitVecRes_StrictFPOp() local
1641 GetSplitVector(Op, OpLo, OpHi); in SplitVecRes_StrictFPOp()
1643 std::tie(OpLo, OpHi) = DAG.SplitVectorOperand(N, i); in SplitVecRes_StrictFPOp()
1646 OpsLo[i] = OpLo; in SplitVecRes_StrictFPOp()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 20006 SDValue OpLo = DAG.getNode(ExtendInVecOpc, dl, HalfVT, In); in LowerAVXExtend() local
20012 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpLo); in LowerAVXExtend()
20020 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi); in LowerAVXExtend()
20593 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i64, In, in LowerTRUNCATE() local
20598 return DAG.getVectorShuffle(VT, DL, DAG.getBitcast(MVT::v4i32, OpLo), in LowerTRUNCATE()
24376 SDValue OpLo = DAG.getNode(ISD::SIGN_EXTEND_VECTOR_INREG, dl, HalfVT, In); in LowerSIGN_EXTEND() local
24386 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi); in LowerSIGN_EXTEND()
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