| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 169 buildMI(MBB, MBBI, OpHi) in expandArith()
382 buildMI(MBB, MBBI, OpHi) in expand()
431 unsigned OpHi = AVR::COMRd; in expand() local
443 buildMI(MBB, MBBI, OpHi) in expand()
568 unsigned OpHi = AVR::LDIRdK; in expand() local
576 buildMI(MBB, MBBI, OpHi) in expand()
619 unsigned OpHi = AVR::LDSRdK; in expand() local
1459 buildMI(MBB, MBBI, OpHi) in expand()
1774 buildMI(MBB, MBBI, OpHi) in expand()
1984 buildMI(MBB, MBBI, OpHi) in expand()
[all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 1962 const MachineOperand &OpHi = LoIs1 ? MI.getOperand(3) : MI.getOperand(1); in evaluate() local
1964 RegisterSubReg SrcRL(OpLo), SrcRH(OpHi); in evaluate()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 2397 MachineOperand OpHi = MI.getOperand(2); in expandPostRAPseudo() local
2427 if (OpHi.isGlobal()) in expandPostRAPseudo()
2428 OpHi.setOffset(OpHi.getOffset() + Adjust + 12); in expandPostRAPseudo()
2431 .add(OpHi)); in expandPostRAPseudo()
|
| H A D | SIISelLowering.cpp | 5457 SDValue OpHi = DAG.getNode(Opc, SL, Hi.getValueType(), Hi, in splitUnaryVectorOp() local
5460 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitUnaryVectorOp()
5483 SDValue OpHi = DAG.getNode(Opc, SL, Hi0.getValueType(), Hi0, Hi1, in splitBinaryVectorOp() local
5486 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitBinaryVectorOp()
5515 SDValue OpHi = DAG.getNode(Opc, SL, ResVT.second, Hi0, Hi1, Hi2, in splitTernaryVectorOp() local
5518 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitTernaryVectorOp()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1634 SDValue OpHi = Op; in SplitVecRes_StrictFPOp() local
1641 GetSplitVector(Op, OpLo, OpHi); in SplitVecRes_StrictFPOp()
1643 std::tie(OpLo, OpHi) = DAG.SplitVectorOperand(N, i); in SplitVecRes_StrictFPOp()
1647 OpsHi[i] = OpHi; in SplitVecRes_StrictFPOp()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 20017 SDValue OpHi = getUnpackh(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef); in LowerAVXExtend() local
20018 OpHi = DAG.getBitcast(HalfVT, OpHi); in LowerAVXExtend()
20020 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi); in LowerAVXExtend()
20595 SDValue OpHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i64, In, in LowerTRUNCATE() local
20599 DAG.getBitcast(MVT::v4i32, OpHi), ShufMask); in LowerTRUNCATE()
24383 SDValue OpHi = DAG.getVectorShuffle(InVT, dl, In, In, ShufMask); in LowerSIGN_EXTEND() local
24384 OpHi = DAG.getNode(ISD::SIGN_EXTEND_VECTOR_INREG, dl, HalfVT, OpHi); in LowerSIGN_EXTEND()
24386 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi); in LowerSIGN_EXTEND()
|