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Searched refs:OpDemandedElts (Results 1 – 3 of 3) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp3054 APInt OpDemandedElts(InnerVWidth, 0); in simplifyDemandedVectorEltsIntrinsic() local
3060 OpDemandedElts.setBit((Lane * InnerVWidthPerLane) + Elt); in simplifyDemandedVectorEltsIntrinsic()
3066 simplifyAndSetOp(&II, OpNum, OpDemandedElts, OpUndefElts); in simplifyDemandedVectorEltsIntrinsic()
H A DX86ISelLowering.cpp38982 APInt OpDemandedElts = APInt::getZero(RootMask.size()); in combineX86ShufflesRecursively() local
38986 OpDemandedElts.setBit(M - BaseIdx); in combineX86ShufflesRecursively()
38993 assert(OpDemandedElts in combineX86ShufflesRecursively()
38997 OpDemandedElts = OpDemandedElts.extractBits(NumOpMaskElts, 0); in combineX86ShufflesRecursively()
38999 OpDemandedElts = in combineX86ShufflesRecursively()
39000 APIntOps::ScaleBitMask(OpDemandedElts, VT.getVectorNumElements()); in combineX86ShufflesRecursively()
39007 if (getTargetShuffleInputs(Op, OpDemandedElts, OpInputs, OpMask, OpUndef, in combineX86ShufflesRecursively()
39290 APInt OpDemandedElts(Mask.size(), 0); in combineX86ShufflesRecursively() local
39294 OpDemandedElts.setBit(OpEltIdx); in combineX86ShufflesRecursively()
39304 assert(!OpDemandedElts.extractBits( in combineX86ShufflesRecursively()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp24914 for (APInt &OpDemandedElts : OpsDemandedElts) in combineShuffleToZeroExtendVectorInReg()
24915 OpDemandedElts = APInt::getZero(NumElts); in combineShuffleToZeroExtendVectorInReg()