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Searched refs:Op2Reg (Results 1 – 7 of 7) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CmovConversion.cpp838 Register Op2Reg = MIIt->getOperand(2).getReg(); in convertCmovInstsToBranches() local
844 std::swap(Op1Reg, Op2Reg); in convertCmovInstsToBranches()
850 auto Op2Itr = RegRewriteTable.find(Op2Reg); in convertCmovInstsToBranches()
852 Op2Reg = Op2Itr->second.second; in convertCmovInstsToBranches()
860 .addReg(Op2Reg) in convertCmovInstsToBranches()
872 RegRewriteTable[DestReg] = std::make_pair(Op1Reg, Op2Reg); in convertCmovInstsToBranches()
H A DX86InstrInfo.cpp2791 Register Op2Reg = MI.getOperand(CommutableOpIdx2).getReg(); in findThreeSrcCommutedOpIndices() local
2803 if (Op2Reg != MI.getOperand(CommutableOpIdx1).getReg()) in findThreeSrcCommutedOpIndices()
H A DX86ISelLowering.cpp34375 Register Op2Reg = MIIt->getOperand(2).getReg(); in createPHIsForCMOVsInSinkBB() local
34381 std::swap(Op1Reg, Op2Reg); in createPHIsForCMOVsInSinkBB()
34386 if (RegRewriteTable.contains(Op2Reg)) in createPHIsForCMOVsInSinkBB()
34387 Op2Reg = RegRewriteTable[Op2Reg].second; in createPHIsForCMOVsInSinkBB()
34393 .addReg(Op2Reg) in createPHIsForCMOVsInSinkBB()
34397 RegRewriteTable[DestReg] = std::make_pair(Op1Reg, Op2Reg); in createPHIsForCMOVsInSinkBB()
34538 Register Op2Reg = FirstCMOV.getOperand(2).getReg(); in EmitLoweredCascadedSelect() local
34543 .addReg(Op2Reg) in EmitLoweredCascadedSelect()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1630 unsigned Op2Reg = 0; in SelectSelect() local
1632 Op2Reg = getRegForValue(I->getOperand(2)); in SelectSelect()
1633 if (Op2Reg == 0) return false; in SelectSelect()
1657 Op2Reg = constrainOperandRegClass(TII.get(MovCCOpc), Op2Reg, 1); in SelectSelect()
1661 .addReg(Op2Reg) in SelectSelect()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp1584 const Register Op2Reg = I.getOperand(2).getReg(); in selectMulDivRem() local
1587 assert(RegTy == MRI.getType(Op1Reg) && RegTy == MRI.getType(Op2Reg) && in selectMulDivRem()
1713 !RBI.constrainGenericRegister(Op2Reg, *RegRC, MRI) || in selectMulDivRem()
1758 .addReg(Op2Reg); in selectMulDivRem()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp3272 Register Op2Reg = MIIt->getOperand(2).getReg(); in EmitLoweredSelect() local
3278 std::swap(Op1Reg, Op2Reg); in EmitLoweredSelect()
3283 if (RegRewriteTable.find(Op2Reg) != RegRewriteTable.end()) in EmitLoweredSelect()
3284 Op2Reg = RegRewriteTable[Op2Reg].second; in EmitLoweredSelect()
3290 .addReg(Op2Reg) in EmitLoweredSelect()
3294 RegRewriteTable[DestReg] = std::make_pair(Op1Reg, Op2Reg); in EmitLoweredSelect()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp7956 auto [DstReg, DstTy, MaskReg, MaskTy, Op1Reg, Op1Ty, Op2Reg, Op2Ty] = in lowerSelect()
7966 Op2Reg = MIRBuilder.buildPtrToInt(NewTy, Op2Reg).getReg(0); in lowerSelect()
7996 auto NewOp2 = MIRBuilder.buildAnd(MaskTy, Op2Reg, NotMask); in lowerSelect()