Searched refs:Op1VT (Results 1 – 3 of 3) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 15155 EVT Op1VT = N->getOperand(1).getValueType(); in combineStoreFPToInt() local
15163 (Op1VT == MVT::i32 || (Op1VT == MVT::i64 && Subtarget.isPPC64()) || in combineStoreFPToInt()
15164 (Subtarget.hasP9Vector() && (Op1VT == MVT::i16 || Op1VT == MVT::i8))); in combineStoreFPToInt()
15177 unsigned ByteSize = Op1VT.getScalarSizeInBits() / 8; in combineStoreFPToInt()
15180 DAG.getValueType(Op1VT)}; in combineStoreFPToInt()
15645 EVT Op1VT = N->getOperand(1).getValueType(); in PerformDAGCombine() local
15665 (Op1VT == MVT::i32 || Op1VT == MVT::i16 || in PerformDAGCombine()
15681 if (Op1VT.bitsGT(mVT)) { in PerformDAGCombine()
15686 if (Op1VT == MVT::i64) in PerformDAGCombine()
15720 if (Op1VT.isSimple()) { in PerformDAGCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9137 EVT Op1VT = V1.getValueType(); in LowerCONCAT_VECTORS_i1() local
9139 assert(Op1VT == Op2VT && "Operand types don't match!"); in LowerCONCAT_VECTORS_i1()
9140 assert((Op1VT == MVT::v2i1 || Op1VT == MVT::v4i1 || Op1VT == MVT::v8i1) && in LowerCONCAT_VECTORS_i1()
9142 EVT VT = Op1VT.getDoubleNumVectorElementsVT(*DAG.getContext()); in LowerCONCAT_VECTORS_i1()
9144 SDValue NewV1 = PromoteMVEPredVector(dl, V1, Op1VT, DAG); in LowerCONCAT_VECTORS_i1()
9151 unsigned NumElts = 2 * Op1VT.getVectorNumElements(); in LowerCONCAT_VECTORS_i1()
9154 if (Op1VT == MVT::v4i1 || Op1VT == MVT::v8i1) { in LowerCONCAT_VECTORS_i1()
9239 EVT Op1VT = V1.getValueType(); in LowerEXTRACT_SUBVECTOR() local
9248 SDValue NewV1 = PromoteMVEPredVector(dl, V1, Op1VT, DAG); in LowerEXTRACT_SUBVECTOR()
9676 EVT Op1VT = Op1.getValueType(); in LowerMUL() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4775 EVT Op1VT = Op1.getValueType(); in LowerMUL() local
4780 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
4782 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)), in LowerMUL()
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