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Searched refs:OffsetReg (Results 1 – 25 of 25) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFrameLowering.cpp303 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
304 BuildMI(MBB, InsertPt, DL, TII->get(getOpcConst(MF)), OffsetReg) in emitPrologue()
308 .addReg(OffsetReg); in emitPrologue()
355 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue() local
356 BuildMI(MBB, InsertPt, DL, TII->get(getOpcConst(MF)), OffsetReg) in emitEpilogue()
364 .addReg(OffsetReg); in emitEpilogue()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.h50 unsigned OffsetReg,
56 unsigned OffsetReg,
246 unsigned OffsetReg) const;
254 unsigned OffsetReg) const;
H A DR600InstrInfo.cpp1014 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1015 if (OffsetReg == R600::INDIRECT_BASE_ADDR) { in expandPostRAPseudo()
1020 OffsetReg); in expandPostRAPseudo()
1028 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1029 if (OffsetReg == R600::INDIRECT_BASE_ADDR) { in expandPostRAPseudo()
1035 OffsetReg); in expandPostRAPseudo()
1090 unsigned OffsetReg) const { in buildIndirectWrite()
1097 unsigned OffsetReg, in buildIndirectWrite() argument
1122 unsigned OffsetReg) const { in buildIndirectRead()
1129 unsigned OffsetReg, in buildIndirectRead() argument
[all …]
H A DAMDGPUCallLowering.cpp226 auto OffsetReg = MIRBuilder.buildConstant(S32, Offset); in getStackAddress() local
228 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress()
409 auto OffsetReg = B.buildConstant(LLT::scalar(64), Offset); in lowerParameterPtr() local
411 B.buildPtrAdd(DstReg, KernArgSegmentVReg, OffsetReg); in lowerParameterPtr()
H A DSIRegisterInfo.cpp842 Register OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in materializeFrameBaseRegister() local
848 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::S_MOV_B32), OffsetReg) in materializeFrameBaseRegister()
855 .addReg(OffsetReg, RegState::Kill) in materializeFrameBaseRegister()
861 .addReg(OffsetReg, RegState::Kill) in materializeFrameBaseRegister()
H A DAMDGPUInstructionSelector.cpp858 Register OffsetReg = MI.getOperand(2).getReg(); in selectG_SBFX_UBFX() local
873 .addReg(OffsetReg) in selectG_SBFX_UBFX()
4245 if (Register OffsetReg = in selectSmrdOffset() local
4248 *SOffset = OffsetReg; in selectSmrdOffset()
4278 if (Register OffsetReg = matchZeroExtendFromS32(*MRI, GEPI.SgprParts[1])) { in selectSmrdOffset() local
4280 *SOffset = OffsetReg; in selectSmrdOffset()
H A DAMDGPURegisterBankInfo.cpp1464 Register OffsetReg = MI.getOperand(FirstOpnd + 1).getReg(); in applyMappingBFE() local
1479 auto ShiftOffset = Signed ? B.buildAShr(S64, SrcReg, OffsetReg) in applyMappingBFE()
1480 : B.buildLShr(S64, SrcReg, OffsetReg); in applyMappingBFE()
1531 auto ClampOffset = B.buildAnd(S32, OffsetReg, OffsetMask); in applyMappingBFE()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/
H A DLanaiAsmParser.cpp130 unsigned OffsetReg; member
176 return Mem.OffsetReg; in getMemOffsetReg()
616 Op->Mem.OffsetReg = 0; in MorphToMemImm()
624 unsigned OffsetReg = Op->getReg(); in MorphToMemRegReg() local
628 Op->Mem.OffsetReg = OffsetReg; in MorphToMemRegReg()
640 Op->Mem.OffsetReg = 0; in MorphToMemRegImm()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp84 auto OffsetReg = MIRBuilder.buildConstant(SType, Offset); in getStackAddress() local
85 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp565 unsigned OffsetReg = 0; in ReduceLoadStore() local
569 OffsetReg = MI->getOperand(2).getReg(); in ReduceLoadStore()
604 assert((!HasShift || OffsetReg) && "Invalid so_reg load / store address!"); in ReduceLoadStore()
607 MIB.addReg(OffsetReg, getKillRegState(OffsetKill) | in ReduceLoadStore()
H A DARMCallLowering.cpp104 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress() local
106 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
H A DThumb2InstrInfo.cpp625 Register OffsetReg = MI.getOperand(FrameRegIdx + 1).getReg(); in rewriteT2FrameIndex() local
626 if (OffsetReg != 0) { in rewriteT2FrameIndex()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp100 auto OffsetReg = MIRBuilder.buildConstant(SType, Offset); in getStackAddress() local
102 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp263 unsigned OffsetReg; member
357 return Mem.OffsetReg; in getMemOffsetReg()
573 Op->Mem.OffsetReg = offsetReg; in MorphToMEMrr()
582 Op->Mem.OffsetReg = Sparc::G0; // always 0 in CreateMEMr()
594 Op->Mem.OffsetReg = 0; in MorphToMEMri()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp239 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress() local
240 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
H A DMipsSEInstrInfo.cpp865 Register OffsetReg = I->getOperand(0).getReg(); in expandEhReturn() local
879 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), SP).addReg(SP).addReg(OffsetReg); in expandEhReturn()
H A DMipsISelLowering.cpp2566 unsigned OffsetReg = ABI.IsN64() ? Mips::V1_64 : Mips::V1; in lowerEH_RETURN() local
2568 Chain = DAG.getCopyToReg(Chain, DL, OffsetReg, Offset, SDValue()); in lowerEH_RETURN()
2571 DAG.getRegister(OffsetReg, Ty), in lowerEH_RETURN()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp77 auto OffsetReg = MIRBuilder.buildConstant(sXLen, Offset); in getStackAddress() local
79 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonOptAddrMode.cpp168 Register OffsetReg = MI.getOperand(2).getReg(); in canRemoveAddasl() local
173 if (OffsetReg == RR.Reg) { in canRemoveAddasl()
H A DHexagonISelLowering.cpp3308 unsigned OffsetReg = Hexagon::R28; in LowerEH_RETURN() local
3314 Chain = DAG.getCopyToReg(Chain, dl, OffsetReg, Offset); in LowerEH_RETURN()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp267 auto OffsetReg = MIRBuilder.buildConstant(s64, Offset); in getStackAddress() local
269 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
H A DAArch64InstructionSelector.cpp6972 Register OffsetReg = OffsetInst->getOperand(1).getReg(); in selectExtendedSHL() local
6982 std::swap(OffsetReg, ConstantReg); in selectExtendedSHL()
7015 MachineInstr *ExtInst = getDefIgnoringCopies(OffsetReg, MRI); in selectExtendedSHL()
7024 OffsetReg = ExtInst->getOperand(1).getReg(); in selectExtendedSHL()
7029 OffsetReg = moveScalarRegClass(OffsetReg, AArch64::GPR32RegClass, MIB); in selectExtendedSHL()
7035 [=](MachineInstrBuilder &MIB) { MIB.addUse(OffsetReg); }, in selectExtendedSHL()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp2877 Register OffsetReg = AddrI.getOperand(2).getReg(); in canFoldIntoAddrMode() local
2878 if (!OffsetReg.isVirtual() || !MRI.hasOneNonDBGUse(OffsetReg)) in canFoldIntoAddrMode()
2881 const MachineInstr &DefMI = *MRI.getVRegDef(OffsetReg); in canFoldIntoAddrMode()
3444 Register OffsetReg = AM.ScaledReg; in emitLdStWithAddr() local
3445 const TargetRegisterClass *RC = MRI.getRegClass(OffsetReg); in emitLdStWithAddr()
3447 OffsetReg = MRI.createVirtualRegister(&AArch64::GPR32RegClass); in emitLdStWithAddr()
3448 BuildMI(MBB, MemI, DL, get(TargetOpcode::COPY), OffsetReg) in emitLdStWithAddr()
3455 .addReg(OffsetReg) in emitLdStWithAddr()
H A DAArch64FastISel.cpp96 unsigned OffsetReg = 0; member in __anon16c582f80111::AArch64FastISel::Address
122 OffsetReg = Reg; in setOffsetReg()
126 return OffsetReg; in getOffsetReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp34084 unsigned OffsetReg = 0; in EmitVAARGWithCustomInserter() local
34138 OffsetReg = MRI.createVirtualRegister(OffsetRegClass); in EmitVAARGWithCustomInserter()
34139 BuildMI(thisMBB, MIMD, TII->get(X86::MOV32rm), OffsetReg) in EmitVAARGWithCustomInserter()
34149 .addReg(OffsetReg) in EmitVAARGWithCustomInserter()
34160 assert(OffsetReg != 0); in EmitVAARGWithCustomInserter()
34180 .addReg(OffsetReg) in EmitVAARGWithCustomInserter()
34190 .addReg(OffsetReg) in EmitVAARGWithCustomInserter()
34197 .addReg(OffsetReg) in EmitVAARGWithCustomInserter()