| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 246 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local 247 if (!TII->areLoadsFromSameBasePtr(Base, User, Offset1, Offset2) || in ClusterNeighboringLoads() 248 Offset1 == Offset2 || in ClusterNeighboringLoads() 256 O2SMap.insert(std::make_pair(Offset2, User)); in ClusterNeighboringLoads() 257 Offsets.push_back(Offset2); in ClusterNeighboringLoads() 258 if (Offset2 < Offset1) in ClusterNeighboringLoads()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 679 APInt Offset2(DL.getIndexTypeSizeInBits(Load2Ptr->getType()), 0); in foldLoadsRecursive() local 681 Load2Ptr->stripAndAccumulateConstantOffsets(DL, Offset2, in foldLoadsRecursive() 718 if (Offset2.slt(Offset1)) { in foldLoadsRecursive() 721 std::swap(Offset1, Offset2); in foldLoadsRecursive() 752 if ((Shift2 - Shift1) != ShiftDiff || (Offset2 - Offset1) != PrevSize) in foldLoadsRecursive()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 400 int64_t Offset1, Offset2; in ConsecutiveInstr() local 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 409 return ((Offset1 == (Offset2 - 4)) && (ConsecutiveRegisters(Reg1, Reg2))); in ConsecutiveInstr()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Value.cpp | 1032 APInt Offset2(DL.getIndexTypeSizeInBits(Ptr2->getType()), 0); in getPointerOffsetFrom() local 1034 Ptr2 = Ptr2->stripAndAccumulateConstantOffsets(DL, Offset2, true); in getPointerOffsetFrom() 1038 return Offset2.getSExtValue() - Offset1.getSExtValue(); in getPointerOffsetFrom() 1062 return *IOffset2 - *IOffset1 + Offset2.getSExtValue() - in getPointerOffsetFrom()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 464 int64_t &Offset2) const override; 482 int64_t Offset2,
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| H A D | X86InstrInfo.cpp | 8575 int64_t &Offset2) const { in areLoadsFromSameBasePtr() 8695 Offset2 = Disp2->getSExtValue(); in areLoadsFromSameBasePtr() 8700 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument 8702 assert(Offset2 > Offset1); in shouldScheduleLoadsNear() 8703 if ((Offset2 - Offset1) / 8 > 64) in shouldScheduleLoadsNear()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1410 int64_t &Offset2) const { in areLoadsFromSameBasePtr() argument 1423 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument 1528 int64_t Offset2, bool OffsetIsScalable2, in shouldClusterMemOps() argument
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| /freebsd-14.2/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | ContainerModeling.cpp | 127 SymbolRef Offset2, 961 SymbolRef Offset2, in invalidateIteratorPositions() argument 965 compare(State, Pos.getOffset(), Offset2, Opc2); in invalidateIteratorPositions()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 163 int64_t Offset2, bool OffsetIsScalable2,
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| H A D | RISCVInstrInfo.cpp | 2277 int64_t Offset2, bool OffsetIsScalable2, unsigned ClusterSize, in shouldClusterMemOps() argument 2298 return ClusterSize <= 4 && std::abs(Offset1 - Offset2) < CacheLineSize; in shouldClusterMemOps()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 248 int64_t &Offset2) const override; 259 int64_t Offset1, int64_t Offset2,
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| H A D | ARMBaseInstrInfo.cpp | 1949 int64_t &Offset2) const { in areLoadsFromSameBasePtr() 1996 Offset2 = cast<ConstantSDNode>(Load2->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr() 2015 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument 2020 assert(Offset2 > Offset1); in shouldScheduleLoadsNear() 2022 if ((Offset2 - Offset1) / 8 > 64) in shouldScheduleLoadsNear()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | SeparateConstOffsetFromGEP.cpp | 1319 Value *Offset2 = Second->getOperand(1); in swapGEPOperand() local 1320 First->setOperand(1, Offset2); in swapGEPOperand()
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| H A D | ConstraintElimination.cpp | 651 int64_t Offset2 = BDec.Offset; in getConstraint() local 702 if (AddOverflow(Offset1, Offset2, OffsetSum)) in getConstraint()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 184 int64_t Offset2, bool OffsetIsScalable2,
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| H A D | AArch64InstrInfo.cpp | 4225 int64_t Offset2, unsigned Opcode2) { in shouldClusterFI() argument 4242 ObjectOffset2 += Offset2; in shouldClusterFI() 4296 int64_t Offset2 = SecondLdSt.getOperand(2).getImm(); in shouldClusterMemOps() local 4297 if (hasUnscaledLdStOffset(SecondOpc) && !scaleOffset(SecondOpc, Offset2)) in shouldClusterMemOps() 4307 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) && in shouldClusterMemOps() 4313 BaseOp2.getIndex(), Offset2, SecondOpc); in shouldClusterMemOps() 4316 assert(Offset1 <= Offset2 && "Caller should have ordered offsets."); in shouldClusterMemOps() 4318 return Offset1 + 1 == Offset2; in shouldClusterMemOps()
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| H A D | AArch64InstrFormats.td | 10759 int Offset1, int Offset2, int Offset4, int Offset8> { 10785 !cast<DAGOperand>("GPR64pi" # Offset2)>; 10788 !cast<DAGOperand>("GPR64pi" # Offset2)>; 10804 defm : SIMDLdrAliases<NAME, asm, "4h", Count, Offset2, 64>; 10805 defm : SIMDLdrAliases<NAME, asm, "8h", Count, Offset2, 128>;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 564 int64_t Offset2, bool OffsetIsScalable2,
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| H A D | PPCInstrInfo.cpp | 2914 int64_t Offset1 = 0, Offset2 = 0; in shouldClusterMemOps() local 2918 !getMemOperandWithOffsetWidth(SecondLdSt, Base2, Offset2, Width2, TRI) || in shouldClusterMemOps() 2925 assert(Offset1 <= Offset2 && "Caller should have ordered offsets."); in shouldClusterMemOps() 2926 return Offset1 + Width1 == Offset2; in shouldClusterMemOps()
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| H A D | PPCISelLowering.cpp | 13622 int64_t Offset1 = 0, Offset2 = 0; in isConsecutiveLSLoc() local 13624 getBaseWithConstantOffset(BaseLoc, Base2, Offset2, DAG); in isConsecutiveLSLoc() 13625 if (Base1 == Base2 && Offset1 == (Offset2 + Dist * Bytes)) in isConsecutiveLSLoc() 13632 Offset2 = 0; in isConsecutiveLSLoc() 13634 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); in isConsecutiveLSLoc() 13636 return Offset1 == (Offset2 + Dist*Bytes); in isConsecutiveLSLoc()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 1650 int64_t Offset2 = (MCID.TSFlags & SystemZII::Is128Bit ? Offset + 8 : Offset); in getOpcodeForOffset() local 1651 if (isUInt<12>(Offset) && isUInt<12>(Offset2)) { in getOpcodeForOffset() 1661 if (isInt<20>(Offset) && isInt<20>(Offset2)) { in getOpcodeForOffset()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 814 int64_t Offset1, Offset2; in addLoopCarriedDependences() local 818 TII->getMemOperandWithOffset(MI, BaseOp2, Offset2, in addLoopCarriedDependences() 822 (int)Offset1 < (int)Offset2) { in addLoopCarriedDependences()
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| H A D | CodeGenPrepare.cpp | 2376 uint64_t Offset2 = Offset.getLimitedValue(); in optimizeCallInst() local 2377 if (!isAligned(PrefAlign, Offset2)) in optimizeCallInst() 2381 DL->getTypeAllocSize(AI->getAllocatedType()) >= MinSize + Offset2) in optimizeCallInst() 2390 DL->getTypeAllocSize(GV->getValueType()) >= MinSize + Offset2) in optimizeCallInst()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 249 int64_t Offset2, bool OffsetIsScalable2,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 1238 const APInt *Offset1 = nullptr, *Offset2 = nullptr; in foldAndOrOfICmpsUsingRanges() local 1243 if (match(V2, m_Add(m_Value(X), m_APInt(Offset2)))) in foldAndOrOfICmpsUsingRanges() 1257 if (Offset2) in foldAndOrOfICmpsUsingRanges() 1258 CR2 = CR2.subtract(*Offset2); in foldAndOrOfICmpsUsingRanges()
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