| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.cpp | 205 int64_t Offset1 = 0; in getHazardType() local 211 Ptr1 = GetPointerBaseWithConstantOffset(BaseVal1, Offset1, DL, true); in getHazardType() 213 return CheckOffsets(Offset0, Offset1); in getHazardType() 223 Offset1 = MF.getFrameInfo().getObjectOffset(FS1->getFrameIndex()); in getHazardType() 224 return CheckOffsets(Offset0, Offset1); in getHazardType()
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| H A D | ARMBaseInstrInfo.h | 247 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, 259 int64_t Offset1, int64_t Offset2,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 673 APInt Offset1(DL.getIndexTypeSizeInBits(Load1Ptr->getType()), 0); in foldLoadsRecursive() local 675 Load1Ptr->stripAndAccumulateConstantOffsets(DL, Offset1, in foldLoadsRecursive() 718 if (Offset2.slt(Offset1)) { in foldLoadsRecursive() 721 std::swap(Offset1, Offset2); in foldLoadsRecursive() 752 if ((Shift2 - Shift1) != ShiftDiff || (Offset2 - Offset1) != PrevSize) in foldLoadsRecursive() 808 APInt Offset1(DL.getIndexTypeSizeInBits(Load1Ptr->getType()), 0); in foldConsecutiveLoads() local 810 DL, Offset1, /* AllowNonInbounds */ true); in foldConsecutiveLoads() 812 Builder.getInt32(Offset1.getZExtValue())); in foldConsecutiveLoads()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.h | 147 bool isDSOffset2Legal(SDValue Base, unsigned Offset0, unsigned Offset1, 156 SDValue &Offset1) const; 158 SDValue &Offset1) const; 160 SDValue &Offset1, unsigned Size) const;
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| H A D | AMDGPUISelDAGToDAG.cpp | 1130 unsigned Offset1, in isDSOffset2Legal() argument 1132 if (Offset0 % Size != 0 || Offset1 % Size != 0) in isDSOffset2Legal() 1134 if (!isUInt<8>(Offset0 / Size) || !isUInt<8>(Offset1 / Size)) in isDSOffset2Legal() 1224 SDValue &Offset1) const { in SelectDS64Bit4ByteAligned() 1225 return SelectDSReadWrite2(Addr, Base, Offset0, Offset1, 4); in SelectDS64Bit4ByteAligned() 1230 SDValue &Offset1) const { in SelectDS128Bit8ByteAligned() 1231 return SelectDSReadWrite2(Addr, Base, Offset0, Offset1, 8); in SelectDS128Bit8ByteAligned() 1235 SDValue &Offset0, SDValue &Offset1, in SelectDSReadWrite2() argument 1250 Offset1 = CurDAG->getTargetConstant(OffsetValue1 / Size, DL, MVT::i8); in SelectDSReadWrite2() 1301 Offset1 = CurDAG->getTargetConstant(OffsetValue1 / Size, DL, MVT::i8); in SelectDSReadWrite2() [all …]
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| H A D | SIInstrInfo.h | 238 int64_t &Offset1) const override; 247 int64_t Offset1, bool OffsetIsScalable1, 254 int64_t Offset1, unsigned NumLoads) const override;
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| H A D | AMDGPUInstructionSelector.h | 260 bool isDSOffset2Legal(Register Base, int64_t Offset0, int64_t Offset1,
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| H A D | SIInstrInfo.cpp | 237 int64_t &Offset1) const { in areLoadsFromSameBasePtr() 277 Offset1 = Load1->getConstantOperandVal(Offset1Idx); in areLoadsFromSameBasePtr() 309 Offset1 = Load1Offset->getZExtValue(); in areLoadsFromSameBasePtr() 342 Offset1 = Off1->getAsZExtVal(); in areLoadsFromSameBasePtr() 400 unsigned Offset1 = Offset1Op->getImm() & 0xff; in getMemOperandsWithOffsetWidth() local 401 if (Offset0 + 1 != Offset1) in getMemOperandsWithOffsetWidth() 596 int64_t Offset0, int64_t Offset1, in shouldScheduleLoadsNear() argument 598 assert(Offset1 > Offset0 && in shouldScheduleLoadsNear() 604 return (NumLoads <= 16 && (Offset1 - Offset0) < 64); in shouldScheduleLoadsNear() 3649 int64_t Offset0, Offset1; in checkInstOffsetsDoNotOverlap() local [all …]
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| H A D | AMDGPUInstructionSelector.cpp | 1611 unsigned Offset1 = WaveRelease | (WaveDone << 1) | (Instruction << 4); in selectDSOrderedIntrinsic() local 1614 Offset1 |= (CountDw - 1) << 6; in selectDSOrderedIntrinsic() 1617 Offset1 |= ShaderType << 2; in selectDSOrderedIntrinsic() 1619 unsigned Offset = Offset0 | (Offset1 << 8); in selectDSOrderedIntrinsic() 4740 int64_t Offset1, in isDSOffset2Legal() argument 4742 if (Offset0 % Size != 0 || Offset1 % Size != 0) in isDSOffset2Legal() 4744 if (!isUInt<8>(Offset0 / Size) || !isUInt<8>(Offset1 / Size)) in isDSOffset2Legal()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 246 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local 247 if (!TII->areLoadsFromSameBasePtr(Base, User, Offset1, Offset2) || in ClusterNeighboringLoads() 248 Offset1 == Offset2 || in ClusterNeighboringLoads() 254 if (O2SMap.insert(std::make_pair(Offset1, Base)).second) in ClusterNeighboringLoads() 255 Offsets.push_back(Offset1); in ClusterNeighboringLoads() 258 if (Offset2 < Offset1) in ClusterNeighboringLoads()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 400 int64_t Offset1, Offset2; in ConsecutiveInstr() local 401 if (!GetImm(MI1, 2, Offset1)) in ConsecutiveInstr() 409 return ((Offset1 == (Offset2 - 4)) && (ConsecutiveRegisters(Reg1, Reg2))); in ConsecutiveInstr()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 410 int64_t Offset1; in apply() local 412 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() 418 if (((Offset0 ^ Offset1) & 0x18) != 0) in apply()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Value.cpp | 1031 APInt Offset1(DL.getIndexTypeSizeInBits(Ptr1->getType()), 0); in getPointerOffsetFrom() local 1033 Ptr1 = Ptr1->stripAndAccumulateConstantOffsets(DL, Offset1, true); in getPointerOffsetFrom() 1038 return Offset2.getSExtValue() - Offset1.getSExtValue(); in getPointerOffsetFrom() 1063 Offset1.getSExtValue(); in getPointerOffsetFrom()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 463 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, 481 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1409 int64_t &Offset1, in areLoadsFromSameBasePtr() argument 1423 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument 1526 int64_t Offset1, bool OffsetIsScalable1, in shouldClusterMemOps() argument
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| /freebsd-14.2/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | ContainerModeling.cpp | 125 SymbolRef Offset1, 959 SymbolRef Offset1, in invalidateIteratorPositions() argument 964 return compare(State, Pos.getOffset(), Offset1, Opc1) && in invalidateIteratorPositions()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 161 int64_t Offset1, bool OffsetIsScalable1,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | SeparateConstOffsetFromGEP.cpp | 1318 Value *Offset1 = First->getOperand(1); in swapGEPOperand() local 1321 Second->setOperand(1, Offset1); in swapGEPOperand()
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| H A D | ConstraintElimination.cpp | 650 int64_t Offset1 = ADec.Offset; in getConstraint() local 652 Offset1 *= -1; in getConstraint() 702 if (AddOverflow(Offset1, Offset2, OffsetSum)) in getConstraint()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 182 int64_t Offset1, bool OffsetIsScalable1,
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| H A D | AArch64InstrInfo.cpp | 4224 int64_t Offset1, unsigned Opcode1, int FI2, in shouldClusterFI() argument 4241 ObjectOffset1 += Offset1; in shouldClusterFI() 4292 int64_t Offset1 = FirstLdSt.getOperand(2).getImm(); in shouldClusterMemOps() local 4293 if (hasUnscaledLdStOffset(FirstOpc) && !scaleOffset(FirstOpc, Offset1)) in shouldClusterMemOps() 4301 if (Offset1 > 63 || Offset1 < -64) in shouldClusterMemOps() 4307 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) && in shouldClusterMemOps() 4312 return shouldClusterFI(MFI, BaseOp1.getIndex(), Offset1, FirstOpc, in shouldClusterMemOps() 4316 assert(Offset1 <= Offset2 && "Caller should have ordered offsets."); in shouldClusterMemOps() 4318 return Offset1 + 1 == Offset2; in shouldClusterMemOps()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 562 int64_t Offset1, bool OffsetIsScalable1,
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| H A D | PPCInstrInfo.cpp | 2914 int64_t Offset1 = 0, Offset2 = 0; in shouldClusterMemOps() local 2917 if (!getMemOperandWithOffsetWidth(FirstLdSt, Base1, Offset1, Width1, TRI) || in shouldClusterMemOps() 2925 assert(Offset1 <= Offset2 && "Caller should have ordered offsets."); in shouldClusterMemOps() 2926 return Offset1 + Width1 == Offset2; in shouldClusterMemOps()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 814 int64_t Offset1, Offset2; in addLoopCarriedDependences() local 816 if (TII->getMemOperandWithOffset(LdMI, BaseOp1, Offset1, in addLoopCarriedDependences() 822 (int)Offset1 < (int)Offset2) { in addLoopCarriedDependences()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ConstantFolding.cpp | 1267 APInt Offset1(IndexWidth, 0); in ConstantFoldCompareInstOperands() local 1269 Ops1->stripAndAccumulateInBoundsConstantOffsets(DL, Offset1); in ConstantFoldCompareInstOperands() 1274 ConstantInt::get(CE0->getContext(), Offset1)); in ConstantFoldCompareInstOperands()
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