| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 644 unsigned NumParts = in determineAssignments() local 647 if (NumParts == 1) { in determineAssignments() 669 for (unsigned Part = 0; Part < NumParts; ++Part) { in determineAssignments() 675 if (Part == NumParts - 1) in determineAssignments() 747 const unsigned NumParts = Args[i].Flags.size(); in handleAssignments() local 752 if (NumParts != 1 || NewLLT != OrigTy) { in handleAssignments() 755 Args[i].Regs.resize(NumParts); in handleAssignments() 764 assert((j + (NumParts - 1)) < ArgLocs.size() && in handleAssignments() 867 j += NumParts - 1; in handleAssignments() 1003 unsigned NumParts = in getReturnInfo() local [all …]
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| H A D | LegalizerHelper.cpp | 61 unsigned NumParts = Size / NarrowSize; in getNarrowTypeBreakDown() local 66 return {NumParts, 0}; in getNarrowTypeBreakDown() 4031 int NumParts, NumLeftover; in makeDstOps() local 4032 std::tie(NumParts, NumLeftover) = in makeDstOps() 4430 int NumParts = -1; in reduceLoadStoreWidth() local 4439 NumParts = NarrowRegs.size(); in reduceLoadStoreWidth() 4444 if (NumParts == -1) in reduceLoadStoreWidth() 4815 const unsigned NumParts = in fewerElementsVectorReductions() local 4824 if (isPowerOf2_32(NumParts)) { in fewerElementsVectorReductions() 4870 if (Part == NumParts - 1) { in fewerElementsVectorReductions() [all …]
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| H A D | Utils.cpp | 480 void llvm::extractParts(Register Reg, LLT Ty, int NumParts, in extractParts() argument 484 for (int i = 0; i < NumParts; ++i) in extractParts() 498 unsigned NumParts = RegSize / MainSize; in extractParts() local 499 unsigned LeftoverSize = RegSize - NumParts * MainSize; in extractParts() 503 for (unsigned I = 0; I < NumParts; ++I) in extractParts() 568 for (unsigned I = 0; I != NumParts; ++I) { in extractParts() 574 for (unsigned Offset = MainSize * NumParts; Offset < RegSize; in extractParts()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 183 if (NumParts > 1) { in getCopyFromParts() 350 if (NumParts > 1) { in getCopyFromPartsVector() 381 } else if (NumParts > 0) { in getCopyFromPartsVector() 523 if (NumParts == 0) in getCopyToParts() 575 if (NumParts == 1) { in getCopyToParts() 587 if (NumParts & (NumParts - 1)) { in getCopyToParts() 604 NumParts = RoundParts; in getCopyToParts() 695 if (NumParts == 1) { in getCopyToPartsVector() 822 } else if (NumParts > 0) { in getCopyToPartsVector() 974 Part += NumParts; in getCopyToRegs() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTargetTransformInfo.cpp | 668 unsigned NumParts = getNumVectorRegs(SrcTy); in getVectorTruncCost() local 669 if (NumParts <= 2) in getVectorTruncCost() 681 if (NumParts > 1) in getVectorTruncCost() 682 NumParts /= 2; in getVectorTruncCost() 683 Cost += NumParts; in getVectorTruncCost()
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| H A D | SystemZISelLowering.h | 585 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) 589 unsigned NumParts, MVT PartVT, EVT ValueVT,
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| H A D | SystemZISelLowering.cpp | 1554 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const { in splitValueIntoRegisterParts() argument 1556 if (ValueVT.getSizeInBits() == 128 && NumParts == 1 && PartVT == MVT::Untyped) { in splitValueIntoRegisterParts() 1566 SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, in joinRegisterPartsIntoValue() argument 1568 if (ValueVT.getSizeInBits() == 128 && NumParts == 1 && PartVT == MVT::Untyped) { in joinRegisterPartsIntoValue()
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| /freebsd-14.2/contrib/llvm-project/clang/utils/TableGen/ |
| H A D | MveEmitter.cpp | 1767 constexpr unsigned NumParts = 4; in EmitHeader() local 1768 raw_self_contained_string_ostream parts[NumParts]; in EmitHeader() 1923 for (size_t i = 0; i < NumParts; ++i) { in EmitHeader() 2031 constexpr unsigned NumParts = 3; in EmitHeader() local 2032 raw_self_contained_string_ostream parts[NumParts]; in EmitHeader() 2133 for (size_t i = 0; i < NumParts; ++i) { in EmitHeader()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 2435 unsigned NumParts); 7035 !NumParts || (VL.size() / VF) > NumParts; in getBuildVectorCost() 7435 if (NumParts == VL.size()) in adjustExtracts() 7547 if (NumParts == 0 || NumParts >= Mask.size()) in add() 7548 NumParts = 1; in add() 7565 if (NumParts == 0 || NumParts >= Mask.size()) in add() 7566 NumParts = 1; in add() 9706 unsigned NumParts) { in isGatherShuffledEntry() argument 9707 assert(NumParts > 0 && NumParts < VL.size() && in isGatherShuffledEntry() 10683 if (NumParts == 0 || NumParts >= GatheredScalars.size()) in processBuildVector() [all …]
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| H A D | LoopVectorize.cpp | 6446 if (unsigned NumParts = TTI.getNumberOfParts(VectorTy)) { in getInstructionCost() local 6453 TypeNotScalarized = NumParts <= VF.getKnownMinValue(); in getInstructionCost() 6455 TypeNotScalarized = NumParts < VF.getKnownMinValue(); in getInstructionCost()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 728 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) 733 unsigned NumParts, MVT PartVT, EVT ValueVT,
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| H A D | RISCVISelLowering.cpp | 19844 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const { in splitValueIntoRegisterParts() argument 19898 SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, in joinRegisterPartsIntoValue() argument
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 908 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) 913 unsigned NumParts, MVT PartVT, EVT ValueVT,
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| H A D | ARMISelLowering.cpp | 4443 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const { in splitValueIntoRegisterParts() argument 4458 SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, in joinRegisterPartsIntoValue() argument 13394 unsigned NumParts = VecVT.getSizeInBits() / 128; in PerformVQDMULHCombine() local 13396 for (unsigned I = 0; I < NumParts; ++I) { in PerformVQDMULHCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 254 void extractParts(Register Reg, LLT Ty, int NumParts,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 722 unsigned NumParts = Bits / 32; in buildReadFirstLane() local 730 for (unsigned i = 0; i < NumParts; ++i) in buildReadFirstLane() 734 for (unsigned i = 0; i < NumParts; ++i) { in buildReadFirstLane() 737 MRI.setType(DstPart, NumParts == 1 ? Ty : S32); in buildReadFirstLane() 898 unsigned NumParts = OpSize / PartSize; in executeInWaterfallLoop() local 902 if (NumParts == 1) { in executeInWaterfallLoop() 908 for (unsigned i = 0; i < NumParts; ++i) { in executeInWaterfallLoop() 916 for (unsigned i = 0; i < NumParts; ++i) { in executeInWaterfallLoop()
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| H A D | AMDGPULegalizerInfo.cpp | 515 const unsigned NumParts = PointerTy.getSizeInBits() / 32; in castBufferRsrcFromV4I32() local 521 for (unsigned I = 0; I < NumParts; ++I) in castBufferRsrcFromV4I32() 551 const unsigned NumParts = PointerTy.getSizeInBits() / 32; in castBufferRsrcToV4I32() local 553 for (unsigned I = 0; I < NumParts; ++I) in castBufferRsrcToV4I32() 4040 unsigned NumParts = Size / 32; in legalizeMul() local 4042 assert(NumParts >= 2); in legalizeMul() 4056 for (unsigned i = 0; i < NumParts; ++i) { in legalizeMul() 4063 SmallVector<Register, 2> AccumRegs(NumParts); in legalizeMul()
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| H A D | SIRegisterInfo.cpp | 2985 const unsigned NumParts = RegDWORDs / EltDWORDs; in getRegSplitParts() local 2987 return ArrayRef(Parts.data(), NumParts); in getRegSplitParts()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1746 unsigned NumParts = in GetReturnInfo() local 1762 for (unsigned i = 0; i < NumParts; ++i) in GetReturnInfo()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
| H A D | GlobalOpt.cpp | 523 unsigned NumParts = count_if(Parts, [](const auto &Pair) { in SRAGlobal() local 526 if (NumParts > 16) in SRAGlobal()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 1158 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC)
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| H A D | PPCISelLowering.cpp | 18260 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const { in splitValueIntoRegisterParts() argument
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 4320 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const { in splitValueIntoRegisterParts() argument 4344 const SDValue *Parts, unsigned NumParts, in joinRegisterPartsIntoValue() argument
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 6863 unsigned NumParts = 1; in LowerFormalArguments() local 6867 ++NumParts; in LowerFormalArguments() 6875 while (NumParts > 0) { in LowerFormalArguments() 6878 NumParts--; in LowerFormalArguments() 6879 if (NumParts > 0) { in LowerFormalArguments() 7821 unsigned NumParts = 1; in LowerCall() local 7825 ++NumParts; in LowerCall() 7826 StoreSize *= NumParts; in LowerCall() 7843 while (NumParts) { in LowerCall() 7847 NumParts--; in LowerCall() [all …]
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