| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86ShuffleDecode.cpp | 150 unsigned NumLanes = Size / 128; in DecodePSHUFMask() local
151 if (NumLanes == 0) NumLanes = 1; // Handle MMX in DecodePSHUFMask()
152 unsigned NumLaneElts = NumElts / NumLanes; in DecodePSHUFMask()
222 if (NumLanes == 0) NumLanes = 1; // Handle MMX in DecodeUNPCKHMask()
223 unsigned NumLaneElts = NumElts / NumLanes; in DecodeUNPCKHMask()
238 if (NumLanes == 0 ) NumLanes = 1; // Handle MMX in DecodeUNPCKLMask()
239 unsigned NumLaneElts = NumElts / NumLanes; in DecodeUNPCKLMask()
480 unsigned NumLanes = VecSize / 128; in DecodeVPERMILPMask() local
481 unsigned NumEltsPerLane = NumElts / NumLanes; in DecodeVPERMILPMask()
502 unsigned NumLanes = VecSize / 128; in DecodeVPERMIL2PMask() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineFunctionInfo.cpp | 409 unsigned NumLanes = Size / 4; in allocateSGPRSpillToVGPRLane() local
411 if (NumLanes > WaveSize) in allocateSGPRSpillToVGPRLane()
421 for (unsigned I = 0; I < NumLanes; ++I, ++NumSpillLanes) { in allocateSGPRSpillToVGPRLane()
456 unsigned NumLanes = Size / 4; in allocateVGPRSpillToAGPR() local
457 Spill.Lanes.resize(NumLanes, AMDGPU::NoRegister); in allocateVGPRSpillToAGPR()
485 for (int I = NumLanes - 1; I >= 0; --I) { in allocateVGPRSpillToAGPR()
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| H A D | AMDGPURegisterBankInfo.cpp | 1964 unsigned NumLanes = DstRegs.size(); in foldExtractEltToCmpSelect() local
1965 if (!NumLanes) in foldExtractEltToCmpSelect()
1966 NumLanes = 1; in foldExtractEltToCmpSelect()
1971 SmallVector<Register, 2> Res(NumLanes); in foldExtractEltToCmpSelect()
1972 for (unsigned L = 0; L < NumLanes; ++L) in foldExtractEltToCmpSelect()
1981 for (unsigned L = 0; L < NumLanes; ++L) { in foldExtractEltToCmpSelect()
1992 for (unsigned L = 0; L < NumLanes; ++L) { in foldExtractEltToCmpSelect()
2065 unsigned NumLanes = InsRegs.size(); in foldInsertEltToCmpSelect() local
2066 if (!NumLanes) { in foldInsertEltToCmpSelect()
2067 NumLanes = 1; in foldInsertEltToCmpSelect()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 477 unsigned NumLanes = std::max((int)VT.getSizeInBits() / 128, 1); in DecodePALIGNRMask() local
478 unsigned NumLaneElts = NumElts / NumLanes; in DecodePALIGNRMask()
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| H A D | X86InstCombineIntrinsic.cpp | 449 unsigned NumLanes = ResTy->getPrimitiveSizeInBits() / 128; in simplifyX86pack() local
454 unsigned NumSrcEltsPerLane = NumSrcElts / NumLanes; in simplifyX86pack()
492 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in simplifyX86pack()
3045 unsigned NumLanes = Ty0->getPrimitiveSizeInBits() / 128; in simplifyDemandedVectorEltsIntrinsic() local
3046 unsigned VWidthPerLane = VWidth / NumLanes; in simplifyDemandedVectorEltsIntrinsic()
3047 unsigned InnerVWidthPerLane = InnerVWidth / NumLanes; in simplifyDemandedVectorEltsIntrinsic()
3055 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in simplifyDemandedVectorEltsIntrinsic()
3070 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in simplifyDemandedVectorEltsIntrinsic()
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| H A D | X86ISelLowering.cpp | 5051 int NumLanes = VT.getSizeInBits() / 128; in getPackDemandedElts() local
5054 int NumEltsPerLane = NumElts / NumLanes; in getPackDemandedElts()
5076 int NumLanes = VT.getSizeInBits() / 128; in getHorizDemandedElts() local
5078 int NumEltsPerLane = NumElts / NumLanes; in getHorizDemandedElts()
9296 if (NumLanes > 1) { in isMultiLaneShuffleMask()
9297 for (int i = 0; i != NumLanes; ++i) { in isMultiLaneShuffleMask()
10718 int NumLaneElts = NumElts / NumLanes; in lowerShuffleAsUNPCKAndPermute()
11926 int NumLanes = Bits / 128; in lowerShuffleAsZeroOrAnyExtend() local
15309 int NumLaneElts = NumElts / NumLanes; in lowerShuffleAsRepeatedMaskAndLanePermute()
21598 unsigned NumLanes = BitWidth / 128; in lowerAddSubToHorizontalOp() local
[all …]
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| /freebsd-14.2/sys/dev/mpi3mr/mpi/ |
| H A D | mpi30_tool.h | 207 U8 NumLanes; /* 0x11 */ member
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.h | 169 template <unsigned NumLanes, char LaneKind>
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| H A D | AArch64InstPrinter.cpp | 1739 template <unsigned NumLanes, char LaneKind>
1748 if (NumLanes) in printTypedVectorList()
1749 Suffix += itostr(NumLanes) + LaneKind; in printTypedVectorList()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 1219 : TLI(TLI), DL(DL), SE(SE), R(R), NumLanes(NumLanes), in LookAheadHeuristics()
1320 if (std::abs(*Dist) > NumLanes / 2) in getShallowScore()
1366 if (std::abs(Dist) > NumLanes / 2) in getShallowScore()
1579 for (unsigned Lane = 0, NumLanes = getNumLanes(); Lane != NumLanes; in clearUsed() local
1919 unsigned NumLanes = VL.size(); in appendOperandsOfVL() local
1921 OpsVec[OpIdx].resize(NumLanes); in appendOperandsOfVL()
2010 unsigned NumLanes = getNumLanes(); in reorder() local
2631 unsigned NumLanes = Scalars.size(); in setOperandsInOrder() local
2634 Operands[OpIdx].resize(NumLanes); in setOperandsInOrder()
5076 unsigned NumLanes = TE->Scalars.size(); in findExternalStoreUsersReorderIndices() local
[all …]
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| H A D | LoopVectorize.cpp | 2825 Value *NumLanes = getRuntimeVF(Builder, Ty, VF * UF); in getOrCreateVectorTripCount() local
2827 TC, Builder.CreateSub(NumLanes, ConstantInt::get(Ty, 1)), "n.rnd.up"); in getOrCreateVectorTripCount()
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| /freebsd-14.2/contrib/llvm-project/clang/utils/TableGen/ |
| H A D | NeonEmitter.cpp | 775 unsigned NumLanes; in fromTypedefName() local
776 Name.substr(0, I).getAsInteger(10, NumLanes); in fromTypedefName()
778 T.Bitwidth = T.ElementBitwidth * NumLanes; in fromTypedefName()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 2994 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; in UpgradeIntrinsicCall() local
2996 unsigned ControlBitsMask = NumLanes - 1; in UpgradeIntrinsicCall()
2997 unsigned NumControlBits = NumLanes / 2; in UpgradeIntrinsicCall()
3000 for (unsigned l = 0; l != NumLanes; ++l) { in UpgradeIntrinsicCall()
3003 if (l >= NumLanes / 2) in UpgradeIntrinsicCall()
3004 LaneMask += NumLanes; in UpgradeIntrinsicCall()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2354 size_t NumLanes = Op.getSimpleValueType().getVectorNumElements(); in unrollVectorShift() local
2362 for (size_t i = 0; i < NumLanes; ++i) { in unrollVectorShift()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.td | 739 class MVEVectorIndexOperand<int NumLanes> : AsmOperandClass {
740 let Name = "MVEVectorIndex"#NumLanes;
742 let PredicateMethod = "isVectorIndexInRange<"#NumLanes#">";
745 class MVEVectorIndex<int NumLanes> : Operand<i32> {
747 let ParserMatchClass = MVEVectorIndexOperand<NumLanes>;
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| H A D | ARMISelLowering.cpp | 16900 unsigned NumLanes = Op.getValueType().getVectorNumElements(); in PerformVCVTCombine() local
16901 if (FloatBits != 32 || IntBits > 32 || (NumLanes != 4 && NumLanes != 2)) { in PerformVCVTCombine()
16920 ISD::INTRINSIC_WO_CHAIN, dl, NumLanes == 2 ? MVT::v2i32 : MVT::v4i32, in PerformVCVTCombine()
17041 unsigned NumLanes = Op.getValueType().getVectorNumElements(); in PerformVDIVCombine() local
17042 if (FloatBits != 32 || IntBits > 32 || (NumLanes != 4 && NumLanes != 2)) { in PerformVDIVCombine()
17061 dl, NumLanes == 2 ? MVT::v2i32 : MVT::v4i32, in PerformVDIVCombine()
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| /freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 14959 unsigned NumLanes = Ty->getPrimitiveSizeInBits() / 128; in EmitX86BuiltinExpr() local
14960 unsigned NumLaneElts = NumElts / NumLanes; in EmitX86BuiltinExpr()
14985 unsigned NumLanes = Ty->getPrimitiveSizeInBits() / 128; in EmitX86BuiltinExpr() local
14986 unsigned NumLaneElts = NumElts / NumLanes; in EmitX86BuiltinExpr()
15089 unsigned NumLanes = Ty->getPrimitiveSizeInBits() == 512 ? 4 : 2; in EmitX86BuiltinExpr() local
15090 unsigned NumLaneElts = NumElts / NumLanes; in EmitX86BuiltinExpr()
15094 unsigned Index = (Imm % NumLanes) * NumLaneElts; in EmitX86BuiltinExpr()
15095 Imm /= NumLanes; // Discard the bits we just used. in EmitX86BuiltinExpr()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2212 template <unsigned NumLanes>
2215 return VectorIndex.Val < NumLanes; in isVectorIndexInRange()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 17438 unsigned NumLanes = Op.getValueType().getVectorNumElements(); in performFDivCombine() local
17439 switch (NumLanes) { in performFDivCombine()
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