| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 146 const CCValAssign &NextVA = VAs[1]; in assignCustomValue() local
148 assert(NextVA.getValVT() == MVT::f64 && "Unsupported type"); in assignCustomValue()
150 assert(VA.getValNo() == NextVA.getValNo() && in assignCustomValue()
154 assert(NextVA.isRegLoc() && "Value should be in reg"); in assignCustomValue()
167 assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA); in assignCustomValue()
172 assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA); in assignCustomValue()
322 const CCValAssign &NextVA = VAs[1]; in assignCustomValue() local
324 assert(NextVA.getValVT() == MVT::f64 && "Unsupported type"); in assignCustomValue()
326 assert(VA.getValNo() == NextVA.getValNo() && in assignCustomValue()
330 assert(NextVA.isRegLoc() && "Value should be in reg"); in assignCustomValue()
[all …]
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| H A D | ARMISelLowering.h | 794 CCValAssign &VA, CCValAssign &NextVA,
799 SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA,
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| H A D | ARMFastISel.cpp | 1989 CCValAssign &NextVA = ArgLocs[++i]; in ProcessCallArgs() local
1991 assert(VA.isRegLoc() && NextVA.isRegLoc() && in ProcessCallArgs()
1996 .addReg(NextVA.getLocReg(), RegState::Define) in ProcessCallArgs()
1999 RegArgs.push_back(NextVA.getLocReg()); in ProcessCallArgs()
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| H A D | ARMISelLowering.cpp | 2313 CCValAssign &VA, CCValAssign &NextVA, in PassF64ArgInRegs() argument
2323 if (NextVA.isRegLoc()) in PassF64ArgInRegs()
2324 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id))); in PassF64ArgInRegs()
2326 assert(NextVA.isMemLoc()); in PassF64ArgInRegs()
2334 computeAddrForCallArg(dl, DAG, NextVA, StackPtr, IsTailCall, SPDiff); in PassF64ArgInRegs()
4324 CCValAssign &NextVA, in GetF64FormalArgument() argument
4342 if (NextVA.isMemLoc()) { in GetF64FormalArgument()
4344 int FI = MFI.CreateFixedObject(4, NextVA.getLocMemOffset(), true); in GetF64FormalArgument()
4352 Reg = MF.addLiveIn(NextVA.getLocReg(), RC); in GetF64FormalArgument()
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| /freebsd-14.2/contrib/llvm-project/clang/include/clang/AST/ |
| H A D | StmtIterator.h | 71 void NextVA();
97 NextVA();
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| /freebsd-14.2/contrib/llvm-project/clang/lib/AST/ |
| H A D | StmtIterator.cpp | 37 void StmtIteratorBase::NextVA() { in NextVA() function in StmtIteratorBase
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 715 CCValAssign &NextVA, const X86Subtarget &Subtarget) { in Passv64i1ArgInRegs() argument
719 assert(VA.isRegLoc() && NextVA.isRegLoc() && in Passv64i1ArgInRegs()
731 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Hi)); in Passv64i1ArgInRegs()
1006 static SDValue getv64i1Argument(CCValAssign &VA, CCValAssign &NextVA, in getv64i1Argument() argument
1014 assert(NextVA.getValVT() == VA.getValVT() && in getv64i1Argument()
1016 assert(VA.isRegLoc() && NextVA.isRegLoc() && in getv64i1Argument()
1031 Reg = MF.addLiveIn(NextVA.getLocReg(), RC); in getv64i1Argument()
1040 DAG.getCopyFromReg(Root, DL, NextVA.getLocReg(), MVT::i32, *InGlue); in getv64i1Argument()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 473 CCValAssign &NextVA = ArgLocs[++i]; in LowerFormalArguments_32() local
476 if (NextVA.isMemLoc()) { in LowerFormalArguments_32()
478 CreateFixedObject(4, StackOffset+NextVA.getLocMemOffset(),true); in LowerFormalArguments_32()
482 Register loReg = MF.addLiveIn(NextVA.getLocReg(), in LowerFormalArguments_32()
983 CCValAssign &NextVA = ArgLocs[++i]; in LowerCall_32() local
984 if (NextVA.isRegLoc()) { in LowerCall_32()
985 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Part1)); in LowerCall_32()
988 unsigned Offset = NextVA.getLocMemOffset() + StackOffset; in LowerCall_32()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3711 CCValAssign &NextVA = ArgLocs[++i]; in LowerFormalArguments() local
3713 addLiveIn(DAG.getMachineFunction(), NextVA.getLocReg(), RC); in LowerFormalArguments()
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