Searched refs:NewSub (Results 1 – 5 of 5) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAddSub.cpp | 2481 Value *NewSub = SubBuilder(OtherHandOfSubIsTrueVal ? FalseVal : TrueVal); in visitSub() local
2484 SelectInst::Create(Cond, OtherHandOfSubIsTrueVal ? Zero : NewSub, in visitSub()
2485 OtherHandOfSubIsTrueVal ? NewSub : Zero); in visitSub()
2847 Value *NewSub = Builder.CreateFSubFMF(Y, X, &I); in visitFSub() local
2848 return BinaryOperator::CreateFAddFMF(Op0, NewSub, &I); in visitFSub()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitSimplify.cpp | 264 unsigned NewSub = Hexagon::NoSubRegister);
969 unsigned NewSub) { in hasTiedUse() argument
973 [NewSub] (const MachineOperand &Op) -> bool { in hasTiedUse()
974 return Op.getSubReg() != NewSub && Op.isTied(); in hasTiedUse()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1263 SDValue NewSub = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local
1267 if (NewSub || NewSrc) { in SimplifyDemandedBits()
1268 NewSub = NewSub ? NewSub : Sub; in SimplifyDemandedBits()
1270 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc, NewSub, in SimplifyDemandedBits()
3287 SDValue NewSub = SimplifyMultipleUseDemandedVectorElts( in SimplifyDemandedVectorElts() local
3289 if (NewSrc || NewSub) { in SimplifyDemandedVectorElts()
3291 NewSub = NewSub ? NewSub : Sub; in SimplifyDemandedVectorElts()
3293 NewSub, Op.getOperand(2)); in SimplifyDemandedVectorElts()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 46287 SDValue NewSub = in combineCMov() local
46290 SDValue EFLAGS(NewSub.getNode(), 1); in combineCMov()
49164 SDValue NewSub = DAG.getNode( in combineAddOrSubToADCOrSBB() local
49167 SDValue NewEFLAGS = SDValue(NewSub.getNode(), EFLAGS.getResNo()); in combineAddOrSubToADCOrSBB()
49196 SDValue NewSub = in combineAddOrSubToADCOrSBB() local
49199 SDValue NewEFLAGS = NewSub.getValue(EFLAGS.getResNo()); in combineAddOrSubToADCOrSBB()
49226 SDValue NewSub = in combineAddOrSubToADCOrSBB() local
49229 SDValue NewEFLAGS = NewSub.getValue(EFLAGS.getResNo()); in combineAddOrSubToADCOrSBB()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 19126 SDValue NewSub = DAG.getNode(ISD::SUB, DL, VT, Z, Y); in performAddCombineSubShift() local
19127 return DAG.getNode(ISD::ADD, DL, VT, NewSub, Shift); in performAddCombineSubShift()
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