Searched refs:NegOp0 (Results 1 – 3 of 3) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineNegator.cpp | 348 Value *NegOp0 = negate(I->getOperand(0), IsNSW, Depth + 1); in visitImpl() local
349 if (!NegOp0) // Early return. in visitImpl()
354 return Builder.CreateShuffleVector(NegOp0, NegOp1, Shuf->getShuffleMask(), in visitImpl()
389 if (Value *NegOp0 = negate(I->getOperand(0), IsNSW, Depth + 1)) in visitImpl() local
390 return Builder.CreateShl(NegOp0, I->getOperand(1), I->getName() + ".neg", in visitImpl()
463 } else if (Value *NegOp0 = negate(Ops[0], /* IsNSW */ false, Depth + 1)) { in visitImpl() local
464 NegatedOp = NegOp0; in visitImpl()
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| H A D | InstCombineMulDivRem.cpp | 261 if (Value *NegOp0 = in visitMul() local
265 I, Builder.CreateMul(NegOp0, ConstantExpr::getNeg(Op1C), "", in visitMul()
369 if (Value *NegOp0 = Negator::Negate(false, /*IsNSW*/ false, Op0, *this)) in visitMul() local
370 return BinaryOperator::CreateMul(NegOp0, X); in visitMul()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 51467 if (SDValue NegOp0 = isFNEG(DAG, Op.getOperand(0).getNode(), Depth + 1)) in isFNEG() local
51468 if (NegOp0.getValueType() == VT) // FIXME: Can we do better? in isFNEG()
51469 return DAG.getVectorShuffle(VT, SDLoc(Op), NegOp0, DAG.getUNDEF(VT), in isFNEG()
51676 if (SDValue NegOp0 = in getNegatedExpression() local
51679 return DAG.getNode(Opc, SDLoc(Op), VT, NegOp0); in getNegatedExpression()
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