Searched refs:NegLHS (Results 1 – 3 of 3) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 3790 bool NegLHS = false; in tryEmitFMulAdd() local
3795 NegLHS = true; in tryEmitFMulAdd()
3813 (LHSBinOp->use_empty() || NegLHS)) { in tryEmitFMulAdd()
3815 if (NegLHS) in tryEmitFMulAdd()
3817 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, NegLHS, isSub); in tryEmitFMulAdd()
3833 (LHSBinOp->use_empty() || NegLHS)) { in tryEmitFMulAdd()
3835 if (NegLHS) in tryEmitFMulAdd()
3837 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, NegLHS, isSub); in tryEmitFMulAdd()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4801 SDValue NegLHS = DAG.getNode(ISD::FNEG, SL, VT, LHS); in performFNegCombine() local
4805 SDValue Res = DAG.getNode(Opposite, SL, VT, NegLHS, NegRHS, N0->getFlags()); in performFNegCombine()
4939 SDValue NegLHS = DAG.getNode(ISD::FNEG, SL, MVT::f32, LHS); in performFNegCombine() local
4942 return DAG.getNode(ISD::SELECT, SL, MVT::f32, BCSrc.getOperand(0), NegLHS, in performFNegCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 7361 SDValue NegLHS = in getNegatedExpression() local
7363 if (!NegLHS || CostLHS > NegatibleCost::Neutral) { in getNegatedExpression()
7364 RemoveDeadNode(NegLHS); in getNegatedExpression()
7369 Handles.emplace_back(NegLHS); in getNegatedExpression()
7382 RemoveDeadNode(NegLHS); in getNegatedExpression()
7388 return DAG.getSelect(DL, VT, Op.getOperand(0), NegLHS, NegRHS); in getNegatedExpression()
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