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Searched refs:NEG (Results 1 – 25 of 54) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600Instructions.td57 def NEG : InstFlag <"printNeg">;
105 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel,
147 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel,
148 R600_Reg32:$src1, NEG:$src1_neg, REL:$src1_rel, ABS:$src1_abs, SEL:$src1_sel,
187 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, SEL:$src0_sel,
188 R600_Reg32:$src1, NEG:$src1_neg, REL:$src1_rel, SEL:$src1_sel,
189 R600_Reg32:$src2, NEG:$src2_neg, REL:$src2_rel, SEL:$src2_sel,
1033 R600_TReg32_X:$src0_X, NEG:$src0_neg_X, REL:$src0_rel_X, ABS:$src0_abs_X, SEL:$src0_sel_X,
1034 R600_TReg32_X:$src1_X, NEG:$src1_neg_X, REL:$src1_rel_X, ABS:$src1_abs_X, SEL:$src1_sel_X,
1039 R600_TReg32_Y:$src0_Y, NEG:$src0_neg_Y, REL:$src0_rel_Y, ABS:$src0_abs_Y, SEL:$src0_sel_Y,
[all …]
H A DGCNDPPCombine.cpp139 const int64_t Mask = ~(SISrcMods::ABS | SISrcMods::NEG); in isShrinkable()
282 (0LL == (Mod0->getImm() & ~(SISrcMods::ABS | SISrcMods::NEG)))); in createDPPInst()
306 (0LL == (Mod1->getImm() & ~(SISrcMods::ABS | SISrcMods::NEG)))); in createDPPInst()
339 (0LL == (Mod2->getImm() & ~(SISrcMods::ABS | SISrcMods::NEG)))); in createDPPInst()
H A DAMDGPUISelDAGToDAG.cpp2795 Mods |= SISrcMods::NEG; in SelectVOP3ModsImpl()
2802 Mods |= SISrcMods::NEG; in SelectVOP3ModsImpl()
2924 Mods ^= (SISrcMods::NEG | SISrcMods::NEG_HI); in SelectVOP3PMods()
2937 Mods ^= SISrcMods::NEG; in SelectVOP3PMods()
3031 Mods ^= SISrcMods::NEG; in SelectVOP3PModsNeg()
3124 Mods |= SISrcMods::NEG; in selectWMMAModsNegAbs()
3184 Mods |= SISrcMods::NEG; in SelectWMMAModsF16Neg()
3203 Mods |= SISrcMods::NEG; in SelectWMMAModsF16Neg()
3413 if ((ModsTmp & SISrcMods::NEG) != 0) in SelectVOP3PMadMixModsImpl()
3414 Mods ^= SISrcMods::NEG; in SelectVOP3PMadMixModsImpl()
H A DSIDefines.h266 NEG = 1 << 0, // Floating-point negate modifier enumerator
H A DAMDGPUInstructionSelector.cpp3723 Mods |= SISrcMods::NEG; in selectVOP3ModsImpl()
3731 Mods |= SISrcMods::NEG; in selectVOP3ModsImpl()
3884 Mods ^= (SISrcMods::NEG | SISrcMods::NEG_HI); in selectVOP3PModsImpl()
3939 Mods ^= SISrcMods::NEG; in selectVOP3PModsNeg()
3992 Mods |= SISrcMods::NEG; in selectWMMAModsNegAbs()
4063 Mods |= SISrcMods::NEG; in selectWMMAModsF16Neg()
5461 if ((ModsTmp & SISrcMods::NEG) != 0) in selectVOP3PMadMixModsImpl()
5462 Mods ^= SISrcMods::NEG; in selectVOP3PMadMixModsImpl()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCScheduleP7.td189 NEG, NEG8, NEG8_rec, NEG_rec, NEG8O, NEGO,
243 (instregex "^F(N)?(M)?(R|ADD|SUB|ABS|NEG|NABS|UL)(D|S)?(_rec)?$"),
246 (instregex "^XS(NEG|ABS|NABS|ADD|SUB|MUL)(D|S)P(s)?$"),
260 (instregex "^XV(MAX|MIN|MUL|NEG|ABS|ADD|NABS)(D|S)P$"),
H A DPPCScheduleP8.td173 (instregex "^(F|XS)(ABS|CPSGN|ADD|MUL|NABS|RE|NEG|SUB|SEL|RSQRTE)(D|S)?(P)?(s)?(_rec)?$"),
192 (instregex "^XV(N)?(M)?(RSQRTE|CPSGN|SUB|ADD|ABS|UL|NEG|RE)(A|M)?DP$"),
207 (instregex "^(ADD|SUBF|NEG)(4|8)?_rec$"),
262 (instregex "^NEG(8)?(O)?$"))>;
H A DPPCBack2BackFusion.def135 NEG,
673 NEG,
H A DP9InstrResources.td139 (instregex "NEG(8)?(O)?(_rec)?$"),
152 (instregex "NEG(8)?(O)?$"),
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.td76 def NEG : SDNodeXForm<imm, [{
341 (SUB_I_LO GPR:$Rs1, (NEG $imm))>;
343 (ADD_I_LO GPR:$Rs1, (NEG $imm))>;
432 def : Pat<(srl GPR:$Rs1, immShift:$imm), (SL_I GPR:$Rs1, (NEG $imm))>;
433 def : Pat<(sra GPR:$Rs1, immShift:$imm), (SA_I GPR:$Rs1, (NEG $imm))>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedKryoDetails.td645 (instregex "F(ABS|NEG)(D|S)r")>;
651 (instregex "F(ABS|NEG)v2f32")>;
657 (instregex "F(ABS|NEG)(v2f64|v4f32)")>;
1668 (instregex "NEG(v8i8|v4i16|v2i32|v1i64)")>;
1674 (instregex "NEG(v16i8|v8i16|v4i32|v2i64)")>;
1824 (instregex "SQ(ABS|NEG)(v1i8|v1i16|v1i32|v1i64)")>;
1830 (instregex "SQ(ABS|NEG)(v8i8|v4i16|v2i32)")>;
1836 (instregex "SQ(ABS|NEG)(v16i8|v8i16|v4i32|v2i64)")>;
H A DAArch64SchedTSV110.td484 def : InstRW<[TSV110Wr_2cyc_1F], (instregex "F(ABS|NEG)(D|S)r")>;
557 def : InstRW<[TSV110Wr_2cyc_1FSU1_1FSU2], (instregex "^(ABS|ADD(P)?|NEG|SUB)v")>;
569 def : InstRW<[TSV110Wr_4cyc_1FSU1_1FSU2], (instregex "^((SQ)(ABS|NEG))v")>;
H A DAArch64SchedA55.td396 def : InstRW<[CortexA55WriteAluVd_2], (instregex "(ADD|SUB|NEG)v(1i64|2i32|4i16|8i8)",
398 def : InstRW<[CortexA55WriteAluVq_2], (instregex "(ADD|SUB|NEG)v(2i64|4i32|8i16|16i8)",
H A DAArch64SchedA510.td406 def : InstRW<[CortexA510Write<3, CortexA510UnitVALU>], (instregex "(ADD|SUB|NEG)v(1i64|2i32|4i16|8i…
408 def : InstRW<[CortexA510Write<4, CortexA510UnitVALU>], (instregex "(ADD|SUB|NEG)v(2i64|4i32|8i16|16…
645 (instregex "^(ABS|CNOT|NEG)_ZPmZ_[BHSD]",
660 "^SQ(ABS|NEG)_ZPmZ_[BHSD]",
H A DAArch64SchedFalkorDetails.td662 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^NEG(v1i64|v2i32|v4i16|v8i8)$")>;
726 def : InstRW<[FalkorWr_2VXVY_1cyc], (instregex "^(NEG|SUB)(v16i8|v8i16|v4i32|v2i64)$")>;
753 def : InstRW<[FalkorWr_2VXVY_3cyc], (instregex "^SQ(ABS|NEG)(v16i8|v8i16|v4i32|v2i64)$")>;
H A DAArch64SchedAmpere1.td865 (instregex "^F(ADD|ADDP|CADD|NEG|NMUL|SUB)v.[fi]16")>;
894 (instregex "^F(ADD|ADDP|CADD|NEG|NMUL|SUB)v.[fi](32|64)")>;
H A DAArch64SchedAmpere1B.td831 (instregex "^F(ADD|ADDP|CADD|NEG|NMUL|SUB)v.[fi]16")>;
869 (instregex "^F(ADD|ADDP|CADD|NEG|NMUL|SUB)v.[fi](32|64)")>;
H A DAArch64SchedExynosM4.td733 def : InstRW<[M4WriteNALU1], (instregex "^(ADD|NEG|SUB)v")>;
741 def : InstRW<[M4WriteNMSC1], (instregex "^SQ(ABS|NEG)v")>;
H A DAArch64SchedExynosM5.td781 def : InstRW<[M5WriteNALU2], (instregex "^(ADD|NEG|SUB)v")>;
789 def : InstRW<[M5WriteNMSC1], (instregex "^SQ(ABS|NEG)v")>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrFloat.td56 defm NEG : UnaryFP<fneg, "neg ", 0x8c, 0x9a>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleM7.td421 (instregex "V(ABS|CVT.*|NEG|FP_VMAX.*|FP_VMIN.*|RINT.*)S$")>;
423 (instregex "V(ABS|CVT.*|NEG|FP_VMAX.*|FP_VMIN.*|RINT.*)D$")>;
H A DARMScheduleM85.td597 def : InstRW<[M85GroupBLat1S], (instregex "V(ABS|NEG)(H|S)$")>;
598 def : InstRW<[M85GroupBLat1D], (instregex "V(ABS|NEG)D$")>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrArithmetic.td18 /// MULS/MULU [~] NEG [~] NEGX [~] SUB [~] SUBA [~]
772 // NEG/NEGX
816 def NEG#S#d : MxNeg_D<!cast<MxType>("MxType"#S#"d")>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp918 if (InputModifiers & SISrcMods::NEG) { in printOperandAndFPInputMods()
1357 printPackedModifier(MI, " neg_lo:[", SISrcMods::NEG, O); in printNegLo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.td73 def NEG : RRR_Inst<0x00, 0x00, 0x06, (outs AR:$r), (ins AR:$t),

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