Searched refs:MidReg (Results 1 – 3 of 3) sorted by relevance
244 Register MidReg = I1->getOperand(0).getReg(); in matchExtAddvToUdotAddv() local246 LLT MidTy = MRI.getType(MidReg); in matchExtAddvToUdotAddv()255 if (!MRI.hasOneNonDBGUse(MidReg)) in matchExtAddvToUdotAddv()
1489 Register MidReg = in legalizeIntrinsic() local1494 {MidReg, ZeroReg}) in legalizeIntrinsic()
8010 Register MidReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBCNT() local8021 BuildMI(MBB, MII, DL, InstDesc, MidReg).add(SrcRegSub0).addImm(0); in splitScalar64BitBCNT()8023 BuildMI(MBB, MII, DL, InstDesc, ResultReg).add(SrcRegSub1).addReg(MidReg); in splitScalar64BitBCNT()