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Searched refs:MemOperand (Results 1 – 15 of 15) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp1064 Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
1065 Prefix.setXX2(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
1082 Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
1083 Prefix.setXX2(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
1124 Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
1134 Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
1143 Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
1164 Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
1359 Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg); in emitREXPrefix()
1368 Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg); in emitREXPrefix()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiMemAluCombiner.cpp157 const MachineMemOperand *MemOperand = *MI.memoperands_begin(); in isNonVolatileMemoryOp() local
161 if (MemOperand->isVolatile() || MemOperand->isAtomic()) in isNonVolatileMemoryOp()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSDNodeProperties.td30 def SDNPMemOperand : SDNodeProperty; // Touches memory, has assoc MemOperand
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.h1468 auto *MemOperand = *MI.memoperands_begin();
1469 return MemOperand->isStore() &&
1470 MemOperand->getPseudoValue() &&
1471 MemOperand->getPseudoValue()->kind() == PseudoSourceValue::FixedStack
1472 && !MemOperand->getPseudoValue()->isAliased(MFI);
H A DInstrRefBasedImpl.cpp1358 auto *MemOperand = *MI.memoperands_begin(); in findLocationForMemOperand() local
1359 unsigned SizeInBits = MemOperand->getSizeInBits(); in findLocationForMemOperand()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrThumb.td175 def t_addrmode_pc : MemOperand {
185 def t_addrmode_rr : MemOperand,
198 def t_addrmode_rr_sext : MemOperand,
214 def t_addrmode_rrs1 : MemOperand,
222 def t_addrmode_rrs2 : MemOperand,
230 def t_addrmode_rrs4 : MemOperand,
242 def t_addrmode_is4 : MemOperand,
254 def t_addrmode_is2 : MemOperand,
266 def t_addrmode_is1 : MemOperand,
280 def t_addrmode_sp : MemOperand,
H A DARMInstrInfo.td1145 def ldst_so_reg : MemOperand,
1161 def postidx_imm8 : MemOperand {
1186 def postidx_reg : MemOperand {
1198 def am2offset_reg : MemOperand,
1226 class AddrMode3 : MemOperand,
1249 def am3offset : MemOperand,
1268 class AddrMode5 : MemOperand,
1302 def addrmode6 : MemOperand,
1311 def am6offset : MemOperand,
1406 def addrmode6dup : MemOperand,
[all …]
H A DARMInstrThumb2.td193 def t2addrmode_imm12 : MemOperand,
203 def t2ldrlabel : MemOperand {
226 def t2addrmode_posimm8 : MemOperand {
239 def t2addrmode_negimm8 : MemOperand,
253 class T2AddrMode_Imm8 : MemOperand,
269 def t2am_imm8_offset : MemOperand,
279 class T2AddrMode_Imm8s4 : MemOperand,
296 def t2am_imm8s4_offset : MemOperand {
345 def t2addrmode_so_reg : MemOperand,
356 def addrmode_tbb : MemOperand {
[all …]
H A DARMInstrMVE.td125 class taddrmode_imm7<int shift> : MemOperand,
147 class T2AddrMode_Imm7<int shift> : MemOperand,
187 class t2am_imm7_offset<int shift> : MemOperand,
211 class mve_addr_rq_shift<int shift> : MemOperand {
230 class mve_addr_q_shift<int shift> : MemOperand {
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrUtils.td151 /// MemOperand - This is the memory operand associated with this type. For
153 X86MemOperand MemOperand = memoperand;
1023 : ITy<o, MRMSrcMem, t, out, (ins t.RegClass:$src1, t.MemOperand:$src2), m,
1117 : ITy<o, MRMDestMem, t, out, (ins t.MemOperand:$src1, t.RegClass:$src2), m,
1181 : ITy<o, f, t, out, (ins t.MemOperand:$src1, t.ImmOperand:$src2), m,
1234 : ITy<0x83, f, t, out, (ins t.MemOperand:$src1, t.Imm8Operand:$src2), m,
1241 : ITy<0xC1, f, t, out, (ins t.MemOperand:$src1, u8imm:$src2), m, args, p> {
1319 : ITy<0xD3, f, t, (outs), (ins t.MemOperand:$src1), m, binop_cl_args,
1327 : ITy<0xD3, f, t, (outs t.RegClass:$dst), (ins t.MemOperand:$src1), m, binop_cl_ndd_args,
1354 : ITy<o, f, t, out, (ins t.MemOperand:$src1), m, args, p> {
H A DX86InstrShiftRotate.td368 : ITy<o, MRMDestMem, t, (outs), (ins t.MemOperand:$src1, t.RegClass:$src2, u8imm:$src3),
390 …: ITy<o, MRMDestMem, t, (outs t.RegClass:$dst), (ins t.MemOperand:$src1, t.RegClass:$src2, u8imm:$…
547 : ITy<0xF0, MRMSrcMem, t, (outs t.RegClass:$dst), (ins t.MemOperand:$src1, u8imm:$src2),
572 : ITy<0xF7, MRMSrcMem4VOp3, t, (outs t.RegClass:$dst), (ins t.MemOperand:$src1, t.RegClass:$src2),
H A DX86InstrArithmetic.td1327 (ins t.RegClass:$src1, t.MemOperand:$src2), "andn",
1375 (ins t.MemOperand:$src), "mulx", mulx_args, []>, T8, XD, VEX,
1386 (ins t.MemOperand:$src), "mulx", mulx_args, []>, T8, XD,
1394 def Hrm : PseudoI<(outs t.RegClass:$dst), (ins t.MemOperand:$src), []>,
H A DX86InstrMisc.td1385 (ins t.RegClass:$src1, t.MemOperand:$src2), m, binop_ndd_args,
H A DX86InstrSSE.td6671 : ITy<0xF1, MRMSrcMem, t, (outs rc:$dst), (ins rc:$src1, t.MemOperand:$src2),
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.td123 class MemOperand<RegisterClass regClass> : RegisterOperand<regClass>{
127 def GPRMemZeroOffset : MemOperand<GPR> {
132 def GPRMem : MemOperand<GPR>;
134 def SPMem : MemOperand<SP>;
136 def GPRCMem : MemOperand<GPRC>;