| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 516 BuildFnTy &MatchInfo); 596 void applyBuildFn(MachineInstr &MI, BuildFnTy &MatchInfo); 615 BuildFnTy &MatchInfo); 633 BuildFnTy &MatchInfo); 645 Register Op1, BuildFnTy &MatchInfo); 697 bool matchMulOBy2(MachineInstr &MI, BuildFnTy &MatchInfo); 701 bool matchMulOBy0(MachineInstr &MI, BuildFnTy &MatchInfo); 705 bool matchAddOBy0(MachineInstr &MI, BuildFnTy &MatchInfo); 721 bool matchFsubToFneg(MachineInstr &MI, Register &MatchInfo); 722 void applyFsubToFneg(MachineInstr &MI, Register &MatchInfo); [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCombinerHelper.cpp | 195 MatchInfo = MRI.getVRegDef(Src); in matchFoldableFneg() 205 if (fnegFoldsIntoMI(*MatchInfo) && in matchFoldableFneg() 211 switch (MatchInfo->getOpcode()) { in matchFoldableFneg() 227 return mayIgnoreSignedZero(*MatchInfo); in matchFoldableFneg() 298 Builder.setInstrAndDebugLoc(*MatchInfo); in applyFoldableFneg() 302 switch (MatchInfo->getOpcode()) { in applyFoldableFneg() 305 NegateOperand(MatchInfo->getOperand(1)); in applyFoldableFneg() 309 NegateEitherOperand(MatchInfo->getOperand(1), MatchInfo->getOperand(2)); in applyFoldableFneg() 327 NegateEitherOperand(MatchInfo->getOperand(1), MatchInfo->getOperand(2)); in applyFoldableFneg() 352 NegateEitherOperand(MatchInfo->getOperand(2), MatchInfo->getOperand(3)); in applyFoldableFneg() [all …]
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| H A D | AMDGPUPreLegalizerCombiner.cpp | 120 ClampI64ToI16MatchInfo &MatchInfo) const { in matchClampI64ToI16() 134 auto IsApplicableForCombine = [&MatchInfo]() -> bool { in matchClampI64ToI16() 135 const auto Cmp1 = MatchInfo.Cmp1; in matchClampI64ToI16() 136 const auto Cmp2 = MatchInfo.Cmp2; in matchClampI64ToI16() 154 m_GSMin(m_Reg(Base), m_ICst(MatchInfo.Cmp1)))) { in matchClampI64ToI16() 156 m_GSMax(m_Reg(MatchInfo.Origin), m_ICst(MatchInfo.Cmp2)))) { in matchClampI64ToI16() 162 m_GSMax(m_Reg(Base), m_ICst(MatchInfo.Cmp1)))) { in matchClampI64ToI16() 164 m_GSMin(m_Reg(MatchInfo.Origin), m_ICst(MatchInfo.Cmp2)))) { in matchClampI64ToI16() 182 Register Src = MatchInfo.Origin; in applyClampI64ToI16() 198 auto MinBoundary = std::min(MatchInfo.Cmp1, MatchInfo.Cmp2); in applyClampI64ToI16() [all …]
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| H A D | AMDGPUPostLegalizerCombiner.cpp | 94 CvtF32UByteMatchInfo &MatchInfo) const; 96 const CvtF32UByteMatchInfo &MatchInfo) const; 292 std::function<void(MachineIRBuilder &)> &MatchInfo) const { in matchRcpSqrtToRsq() 317 MatchInfo = [SqrtSrcMI, &MI](MachineIRBuilder &B) { in matchRcpSqrtToRsq() 327 MatchInfo = [RcpSrcMI, &MI](MachineIRBuilder &B) { in matchRcpSqrtToRsq() 338 MachineInstr &MI, CvtF32UByteMatchInfo &MatchInfo) const { in matchCvtF32UByteN() 356 MatchInfo.CvtVal = Src0; in matchCvtF32UByteN() 357 MatchInfo.ShiftOffset = ShiftOffset; in matchCvtF32UByteN() 366 MachineInstr &MI, const CvtF32UByteMatchInfo &MatchInfo) const { in applyCvtF32UByteN() 371 Register CvtSrc = MatchInfo.CvtVal; in applyCvtF32UByteN() [all …]
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| H A D | AMDGPURegBankCombiner.cpp | 85 bool matchIntMinMaxToMed3(MachineInstr &MI, Med3MatchInfo &MatchInfo) const; 86 bool matchFPMinMaxToMed3(MachineInstr &MI, Med3MatchInfo &MatchInfo) const; 89 void applyMed3(MachineInstr &MI, Med3MatchInfo &MatchInfo) const; 193 MachineInstr &MI, Med3MatchInfo &MatchInfo) const { in matchIntMinMaxToMed3() 215 MatchInfo = {OpcodeTriple.Med, Val, K0->VReg, K1->VReg}; in matchIntMinMaxToMed3() 238 MachineInstr &MI, Med3MatchInfo &MatchInfo) const { in matchFPMinMaxToMed3() 268 MatchInfo = {OpcodeTriple.Med, Val, K0->VReg, K1->VReg}; in matchFPMinMaxToMed3() 360 Med3MatchInfo &MatchInfo) const { in applyMed3() 362 B.buildInstr(MatchInfo.Opc, {MI.getOperand(0)}, in applyMed3() 363 {getAsVgpr(MatchInfo.Val0), getAsVgpr(MatchInfo.Val1), in applyMed3() [all …]
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| H A D | AMDGPUCombinerHelper.h | 27 bool matchFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo); 28 void applyFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo);
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1269 MatchInfo.IsPre = findPreIndexCandidate(LdSt, MatchInfo.Addr, MatchInfo.Base, in matchCombineIndexedLoadStore() 1272 !findPostIndexCandidate(LdSt, MatchInfo.Addr, MatchInfo.Base, in matchCombineIndexedLoadStore() 1273 MatchInfo.Offset, MatchInfo.RematOffset)) in matchCombineIndexedLoadStore() 1653 MatchInfo.Imm = in matchShiftImmedChain() 2965 if (!MatchInfo[I]) in applyCombineInsertVecElts() 4089 MatchInfo(Builder); in applyBuildFn() 4096 MatchInfo(Builder); in applyBuildFnNoErase() 4250 MatchInfo = in matchICmpToTrueFalseKnownBits() 4774 MatchInfo = in matchConstantFoldFPBinOp() 6018 MatchInfo = Lo; in matchBuildVectorIdentityFold() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 231 ShuffleVectorPseudo &MatchInfo) { in matchREV() argument 364 MatchInfo = in matchDupFromBuildVector() 450 MIRBuilder.buildInstr(MatchInfo.Opc, {MatchInfo.Dst}, MatchInfo.SrcOps); in applyShuffleVectorPseudo() 459 if (MatchInfo.SrcOps[2].getImm() == 0) in applyEXT() 460 MIRBuilder.buildCopy(MatchInfo.Dst, MatchInfo.SrcOps[0]); in applyEXT() 465 MIRBuilder.buildInstr(MatchInfo.Opc, {MatchInfo.Dst}, in applyEXT() 466 {MatchInfo.SrcOps[0], MatchInfo.SrcOps[1], Cst}); in applyEXT() 674 MatchInfo = *MaybeNewImmAndPred; in matchAdjustICmpImmAndPred() 745 MatchInfo.first = Opc; in matchDupLane() 746 MatchInfo.second = *LaneIdx; in matchDupLane() [all …]
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| H A D | AArch64PreLegalizerCombiner.cpp | 101 MatchInfo = WideReg; in matchICmpRedundantTrunc() 217 std::tie(Offset, MinOffset) = MatchInfo; in applyFoldGlobalOffset() 274 std::get<1>(MatchInfo) = 0; in matchExtAddvToUdotAddv() 278 std::get<2>(MatchInfo) = 0; in matchExtAddvToUdotAddv() 280 std::get<2>(MatchInfo) = 1; in matchExtAddvToUdotAddv() 307 if (std::get<1>(MatchInfo) == 0) in applyExtAddvToUdotAddv() 312 Ext2SrcReg = std::get<1>(MatchInfo); in applyExtAddvToUdotAddv() 425 std::get<1>(MatchInfo) = 0; in matchExtUaddvToUaddlv() 427 std::get<1>(MatchInfo) = 1; in matchExtUaddvToUaddlv() 441 std::get<0>(MatchInfo) = ExtSrcReg; in matchExtUaddvToUaddlv() [all …]
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| H A D | AArch64PostLegalizerCombiner.cpp | 68 std::tuple<unsigned, LLT, Register> &MatchInfo) { in matchExtractVecEltPairwiseAdd() argument 101 std::get<0>(MatchInfo) = TargetOpcode::G_FADD; in matchExtractVecEltPairwiseAdd() 102 std::get<1>(MatchInfo) = DstTy; in matchExtractVecEltPairwiseAdd() 103 std::get<2>(MatchInfo) = Other->getOperand(0).getReg(); in matchExtractVecEltPairwiseAdd() 111 std::tuple<unsigned, LLT, Register> &MatchInfo) { in applyExtractVecEltPairwiseAdd() argument 112 unsigned Opc = std::get<0>(MatchInfo); in applyExtractVecEltPairwiseAdd() 115 LLT Ty = std::get<1>(MatchInfo); in applyExtractVecEltPairwiseAdd() 116 Register Src = std::get<2>(MatchInfo); in applyExtractVecEltPairwiseAdd() 344 std::tuple<Register, Register, Register> &MatchInfo) { in matchOrToBSP() argument 370 MatchInfo = {AO1, AO2, BVO1}; in matchOrToBSP() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/DebugInfo/LogicalView/Core/ |
| H A D | LVOptions.cpp | 506 bool LVPatterns::matchPattern(StringRef Input, const LVMatchInfo &MatchInfo) { in matchPattern() argument 512 for (const LVMatch &Match : MatchInfo) { in matchPattern()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/FileCheck/ |
| H A D | FileCheck.cpp | 1142 SmallVector<StringRef, 4> MatchInfo; in match() local 1146 if (!Regex(RegExToMatch, Flags).match(Buffer, &MatchInfo)) in match() 1150 assert(!MatchInfo.empty() && "Didn't get any match"); in match() 1151 StringRef FullMatch = MatchInfo[0]; in match() 1155 assert(VariableDef.second < MatchInfo.size() && "Internal paren error"); in match() 1157 MatchInfo[VariableDef.second]; in match() 1173 assert(CaptureParenGroup < MatchInfo.size() && "Internal paren error"); in match() 1177 StringRef MatchedValue = MatchInfo[CaptureParenGroup]; in match()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/DebugInfo/LogicalView/Core/ |
| H A D | LVOptions.h | 597 bool matchPattern(StringRef Input, const LVMatchInfo &MatchInfo);
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| /freebsd-14.2/contrib/sqlite3/ |
| H A D | sqlite3.c | 202399 typedef struct MatchInfo MatchInfo; 202400 struct MatchInfo { 203176 MatchInfo *p /* Matchinfo context */ 203214 MatchInfo *p 203261 MatchInfo *p = (MatchInfo *)pCtx; 203278 MatchInfo *p = (MatchInfo *)pCtx; 203316 static size_t fts3MatchinfoSize(MatchInfo *pInfo, char cArg){ 203452 static int fts3MatchinfoLcs(Fts3Cursor *pCsr, MatchInfo *pInfo){ 203543 MatchInfo *pInfo, /* Matchinfo context object */ 203667 MatchInfo sInfo; [all …]
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