| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPInstrPatternsVec.td | 41 // Masked. 80 // Masked. 105 // Masked. 122 // Masked. 154 // Masked. 175 // Masked. 284 // Masked. 445 // Masked. 542 // Masked. 579 // Masked. [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetLibraryInfo.h | 47 bool Masked; variable 53 ElementCount VectorizationFactor, bool Masked, StringRef VABIPrefix) in VecDesc() argument 55 VectorizationFactor(VectorizationFactor), Masked(Masked), in VecDesc() 61 bool isMasked() const { return Masked; } in isMasked() 213 bool Masked) const; 219 bool Masked) const; 402 bool Masked = false) const { 403 return Impl->getVectorizedFunction(F, VF, Masked); 406 bool Masked) const { in getVectorMappingInfo() argument 407 return Impl->getVectorMappingInfo(F, VF, Masked); in getVectorMappingInfo()
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| H A D | TargetTransformInfo.h | 1305 Masked, ///< The cast is used with a masked load/store. enumerator
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | CaymanInstructions.td | 114 let DST_SEL_Y = 7; // Masked 115 let DST_SEL_Z = 7; // Masked 116 let DST_SEL_W = 7; // Masked 124 let DST_SEL_Y = 7; // Masked 125 let DST_SEL_Z = 7; // Masked 126 let DST_SEL_W = 7; // Masked 136 let DST_SEL_Y = 7; // Masked 137 let DST_SEL_Z = 7; // Masked 138 let DST_SEL_W = 7; // Masked
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| H A D | EvergreenInstructions.td | 189 let DST_SEL_Y = 7; // Masked 190 let DST_SEL_Z = 7; // Masked 191 let DST_SEL_W = 7; // Masked 200 let DST_SEL_Y = 7; // Masked 201 let DST_SEL_Z = 7; // Masked 202 let DST_SEL_W = 7; // Masked 213 let DST_SEL_Y = 7; // Masked 214 let DST_SEL_Z = 7; // Masked 215 let DST_SEL_W = 7; // Masked
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| H A D | AMDGPULegalizerInfo.cpp | 5374 auto Masked = B.buildAnd(S32, HighHalf, AndMask); in legalizePointerAsRsrcIntrin() local 5376 MachineInstrBuilder NewHighHalf = Masked; in legalizePointerAsRsrcIntrin() 5390 NewHighHalf = B.buildOr(S32, Masked, ShiftedStride); in legalizePointerAsRsrcIntrin()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.h | 199 uint16_t Masked : 1; member 209 uint16_t Masked : 1; member 219 uint16_t Masked : 1; member 228 uint16_t Masked : 1; member 237 uint16_t Masked : 1; member 246 uint16_t Masked :1; member 254 uint16_t Masked : 1; member
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| H A D | RISCVInstrInfoVPseudos.td | 583 bits<1> Masked = M; 605 bits<1> Masked = M; 616 let PrimaryKey = ["Masked", "Strided", "Log2SEW", "LMUL"]; 621 bits<1> Masked = M; 652 bits<1> Masked = M; 670 bits<1> Masked = M; 688 bits<1> Masked = M; 705 bits<1> Masked = M; 917 RISCVVSE</*Masked*/0, /*Strided*/0, !logtwo(EEW), VLMul> { 931 RISCVVSE</*Masked*/1, /*Strided*/0, !logtwo(EEW), VLMul> { [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 195 Value *Masked, *ShiftShAmt; in dropRedundantMaskingOfLeftShiftInput() local 197 m_Shift(m_Value(Masked), m_ZExtOrSelf(m_Value(ShiftShAmt)))); in dropRedundantMaskingOfLeftShiftInput() 202 if (match(Masked, m_CombineAnd(m_Trunc(m_Value(Masked)), m_Value(Trunc))) && in dropRedundantMaskingOfLeftShiftInput() 207 Type *WidestTy = Masked->getType(); in dropRedundantMaskingOfLeftShiftInput() 229 if (match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X)))) { in dropRedundantMaskingOfLeftShiftInput() 234 if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked, in dropRedundantMaskingOfLeftShiftInput() 263 } else if (match(Masked, m_c_And(m_CombineOr(MaskC, MaskD), m_Value(X))) || in dropRedundantMaskingOfLeftShiftInput() 264 match(Masked, m_Shr(m_Shl(m_Value(X), m_Value(MaskShAmt)), in dropRedundantMaskingOfLeftShiftInput() 270 if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked, in dropRedundantMaskingOfLeftShiftInput() 317 if (!Masked->hasOneUse()) in dropRedundantMaskingOfLeftShiftInput() [all …]
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| H A D | InstCombineSelect.cpp | 3332 Value *Masked = in foldBitCeil() local 3335 Masked); in foldBitCeil()
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | sdhci-common.yaml | 26 Masked SDHCI capabilities to remove from SDHCI_CAPABILITIES and
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TypePromotion.cpp | 637 Value *Masked = Builder.CreateAnd(Trunc->getOperand(0), Mask); in ConvertTruncs() local 639 Masked = Builder.CreateTrunc(Masked, ExtTy); in ConvertTruncs() 641 if (auto *I = dyn_cast<Instruction>(Masked)) in ConvertTruncs() 644 ReplaceAllUsersOfWith(Trunc, Masked); in ConvertTruncs()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Support/ |
| H A D | APFixedPoint.cpp | 47 APInt Masked(NewVal & Mask); in convert() local 50 if (!(Masked == Mask || Masked == 0)) { in convert()
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| /freebsd-14.2/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | riscv_vector.td | 307 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy) 310 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy) 313 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Stride, Mask, VL, Policy) 316 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Index, Mask, VL, Policy) 807 // Masked 998 // Masked 1110 // Masked 1484 // Masked: (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, policy) 1561 // Masked: (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, policy) 1748 // Masked: (passthru, op0, mask, frm, vl, policy) [all …]
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| H A D | riscv_sifive_vector.td | 164 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | TargetLibraryInfo.cpp | 1293 bool Masked) const { in getVectorizedFunction() 1294 const VecDesc *VD = getVectorMappingInfo(F, VF, Masked); in getVectorizedFunction() 1302 bool Masked) const { in getVectorMappingInfo() 1309 if ((I->getVectorizationFactor() == VF) && (I->isMasked() == Masked)) in getVectorMappingInfo()
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| H A D | TargetTransformInfo.cpp | 914 return TTI::CastContextHint::Masked; in getCastContextHint()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemProfiler.cpp | 394 if (auto *Masked = dyn_cast<ConstantInt>(Vector->getOperand(Idx))) { in instrumentMaskedLoadOrStore() local 395 if (Masked->isZero()) in instrumentMaskedLoadOrStore()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsHexagon.td | 415 // Masked vector stores
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| H A D | IntrinsicsRISCV.td | 764 // Masked Vector Multiply-Add operations, its first operand can not be undef. 786 // Masked Vector Multiply-Add operations, its first operand can not be undef. 808 // Masked Widening Vector Multiply-Add operations, its first operand can not be undef. 830 // Masked Widening Vector Multiply-Add operations, its first operand can not be undef.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 2073 Value *Masked = IC.Builder.CreateAnd(Input, II.getArgOperand(1)); in instCombineIntrinsic() local 2075 Value *Shifted = IC.Builder.CreateLShr(Masked, ShiftAmt); in instCombineIntrinsic() 2119 Value *Masked = IC.Builder.CreateAnd(Shifted, II.getArgOperand(1)); in instCombineIntrinsic() local 2120 return IC.replaceInstUsesWith(II, Masked); in instCombineIntrinsic()
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| H A D | X86InstrFragmentsSIMD.td | 723 // Masked versions of above 1142 // Masked store fragments.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 511 if (CCH == TTI::CastContextHint::Masked && DstTy.getSizeInBits() > 128) in getCastInstrCost() 517 CCH == TTI::CastContextHint::Masked) { in getCastInstrCost()
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| /freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGOpenMPRuntime.cpp | 10636 llvm::SmallVector<char, 2> Masked; in emitX86DeclareSimdFunction() local 10639 Masked.push_back('N'); in emitX86DeclareSimdFunction() 10640 Masked.push_back('M'); in emitX86DeclareSimdFunction() 10643 Masked.push_back('N'); in emitX86DeclareSimdFunction() 10646 Masked.push_back('M'); in emitX86DeclareSimdFunction() 10649 for (char Mask : Masked) { in emitX86DeclareSimdFunction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 2599 CCH == TTI::CastContextHint::Masked && ST->hasSVEorSME() && in getCastInstrCost() 2620 CCH == TTI::CastContextHint::Masked && ST->hasSVEorSME() && in getCastInstrCost()
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