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Searched refs:MachineInstr (Results 1 – 25 of 847) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCombinerHelper.h38 class MachineInstr; variable
52 MachineInstr *MI;
76 MachineInstr *Logic;
77 MachineInstr *Shift2;
186 bool dominates(const MachineInstr &DefMI, const MachineInstr &UseMI);
213 bool matchCombineDivRem(MachineInstr &MI, MachineInstr *&OtherMI);
214 void applyCombineDivRem(MachineInstr &MI, MachineInstr *&OtherMI);
581 bool matchExtendThroughPhis(MachineInstr &MI, MachineInstr *&ExtMI);
582 void applyExtendThroughPhis(MachineInstr &MI, MachineInstr *&ExtMI);
668 MachineInstr *buildUDivUsingMul(MachineInstr &MI);
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H A DLegalizerHelper.h37 class MachineInstr; variable
376 LegalizeResult lowerEXT(MachineInstr &MI);
377 LegalizeResult lowerTRUNC(MachineInstr &MI);
379 LegalizeResult lowerRotate(MachineInstr &MI);
382 LegalizeResult lowerUITOFP(MachineInstr &MI);
383 LegalizeResult lowerSITOFP(MachineInstr &MI);
384 LegalizeResult lowerFPTOUI(MachineInstr &MI);
389 LegalizeResult lowerFPOWI(MachineInstr &MI);
396 LegalizeResult lowerFMad(MachineInstr &MI);
414 LegalizeResult lowerBswap(MachineInstr &MI);
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h34 class MachineInstr; variable
72 const MachineInstr &MI,
79 const MachineInstr &MI,
209 const MachineInstr &LdSt,
231 bool PredicateInstruction(MachineInstr &MI,
367 bool isDuplexPair(const MachineInstr &MIa, const MachineInstr &MIb) const;
401 bool isSolo(const MachineInstr &MI) const;
403 bool isTC1(const MachineInstr &MI) const;
404 bool isTC2(const MachineInstr &MI) const;
406 bool isTC4x(const MachineInstr &MI) const;
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H A DHexagonVLIWPacketizer.h23 class MachineInstr; variable
29 std::vector<MachineInstr *> OldPacketMIs;
140 bool useCallersSP(MachineInstr &MI);
141 void useCalleesSP(MachineInstr &MI);
144 bool arePredicatesComplements(MachineInstr &MI1, MachineInstr &MI2);
147 bool isCurifiable(MachineInstr &MI);
148 bool cannotCoexist(const MachineInstr &MI, const MachineInstr &MJ);
157 bool hasDeadDependence(const MachineInstr &I, const MachineInstr &J);
158 bool hasControlDependence(const MachineInstr &I, const MachineInstr &J);
159 bool hasRegMaskDependence(const MachineInstr &I, const MachineInstr &J);
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNHazardRecognizer.h25 class MachineInstr; variable
43 MachineInstr *CurrCycleInstr;
44 std::list<MachineInstr*> EmittedInstrs;
75 void runOnInstruction(MachineInstr *MI);
82 int checkSMRDHazards(MachineInstr *SMRD);
84 int checkDPPHazards(MachineInstr *DPP);
92 int checkRFEHazards(MachineInstr *RFE);
97 void fixHazards(MachineInstr *MI);
107 bool fixWMMAHazards(MachineInstr *MI);
111 int checkMAIHazards(MachineInstr *MI);
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H A DAMDGPULegalizerInfo.h37 bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
48 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
50 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
54 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
56 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
64 bool legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI,
80 bool legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI,
96 bool legalizeFExp(MachineInstr &MI, MachineIRBuilder &B) const;
147 bool legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
218 MachineInstr &MI, MachineIRBuilder &B,
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H A DAMDGPUInstructionSelector.h39 class MachineInstr; variable
58 bool select(MachineInstr &I) override;
89 bool selectCOPY(MachineInstr &I) const;
90 bool selectPHI(MachineInstr &I) const;
91 bool selectG_TRUNC(MachineInstr &I) const;
93 bool selectG_FPEXT(MachineInstr &I) const;
95 bool selectG_FNEG(MachineInstr &I) const;
96 bool selectG_FABS(MachineInstr &I) const;
108 bool selectG_INSERT(MachineInstr &I) const;
115 bool selectBallot(MachineInstr &I) const;
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H A DSIInstrInfo.h52 void insert(MachineInstr *MI);
54 MachineInstr *top() const { in top()
71 bool isDeferred(MachineInstr *MI);
77 SetVector<MachineInstr *> InstrList;
192 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
241 const MachineInstr &LdSt,
300 std::pair<MachineInstr*, MachineInstr*>
396 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg,
401 MachineInstr *convertToThreeAddress(MachineInstr &MI, LiveVariables *LV,
1061 MachineInstr *buildShrunkInst(MachineInstr &MI,
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H A DR600InstrInfo.h34 class MachineInstr; variable
94 bool isTransOnly(const MachineInstr &MI) const;
96 bool isVectorOnly(const MachineInstr &MI) const;
100 bool usesVertexCache(const MachineInstr &MI) const;
102 bool usesTextureCache(const MachineInstr &MI) const;
105 bool usesAddressRegister(MachineInstr &MI) const;
107 bool readsLDSSrcReg(const MachineInstr &MI) const;
119 getSrcs(MachineInstr &MI) const;
156 bool isVector(const MachineInstr &MI) const;
202 bool PredicateInstruction(MachineInstr &MI,
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.h297 MachineInstr *convertToThreeAddress(MachineInstr &MI, LiveVariables *LV,
369 const MachineInstr &LdSt,
422 MachineInstr *
524 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
547 void setSpecialOperandAttr(MachineInstr &OldMI1, MachineInstr &OldMI2,
573 MachineInstr *optimizeLoadInstr(MachineInstr &MI,
578 bool FoldImmediateImpl(MachineInstr &UseMI, MachineInstr *DefMI, Register Reg,
584 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg,
638 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
683 MachineInstr *convertToThreeAddressWithLEA(unsigned MIOpc, MachineInstr &MI,
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H A DX86AsmPrinter.h82 void LowerSTACKMAP(const MachineInstr &MI);
91 void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI,
96 void LowerPATCHABLE_TYPED_EVENT_CALL(const MachineInstr &MI,
104 void LowerKCFI_CHECK(const MachineInstr &MI);
107 void LowerASAN_CHECK_MEMACCESS(const MachineInstr &MI);
110 void EmitSEHInstruction(const MachineInstr *MI);
114 void PrintModifiedOperand(const MachineInstr *MI, unsigned OpNo,
117 void PrintLeaMemReference(const MachineInstr *MI, unsigned OpNo,
142 void emitInstruction(const MachineInstr *MI) override;
146 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h184 virtual MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
438 virtual MachineInstr *convertToThreeAddress(MachineInstr &MI, in convertToThreeAddress()
466 MachineInstr *
804 MachineInstr *IndVar, MachineInstr &Cmp, in reduceLoopCount()
979 virtual MachineInstr *optimizeSelect(MachineInstr &MI,
1171 MachineInstr *foldMemoryOperand(MachineInstr &MI, ArrayRef<unsigned> Ops,
1178 MachineInstr *foldMemoryOperand(MachineInstr &MI, ArrayRef<unsigned> Ops,
1272 void reassociateOps(MachineInstr &Root, MachineInstr &Prev,
1488 virtual MachineInstr *emitLdStWithAddr(MachineInstr &MemI, in emitLdStWithAddr()
1700 virtual MachineInstr *optimizeLoadInstr(MachineInstr &MI, in optimizeLoadInstr()
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H A DReachingDefAnalysis.h34 class MachineInstr; variable
94 DenseMap<MachineInstr *, int> InstIds;
145 bool hasSameReachingDef(MachineInstr *A, MachineInstr *B,
159 MachineInstr *getUniqueReachingMIDef(MachineInstr *MI,
164 MachineInstr *getMIOperand(MachineInstr *MI, unsigned Idx) const;
168 MachineInstr *getMIOperand(MachineInstr *MI, MachineOperand &MO) const;
213 bool isSafeToMoveForwards(MachineInstr *From, MachineInstr *To) const;
216 bool isSafeToMoveBackwards(MachineInstr *From, MachineInstr *To) const;
257 void processDefs(MachineInstr *);
261 bool isSafeToMove(MachineInstr *From, MachineInstr *To) const;
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H A DModuloSchedule.h75 class MachineInstr; variable
91 DenseMap<MachineInstr *, int> Cycle;
135 int getStage(MachineInstr *MI) { in getStage()
141 int getCycle(MachineInstr *MI) { in getCycle()
168 using InstrMapTy = DenseMap<MachineInstr *, MachineInstr *>;
215 void updateMemOperands(MachineInstr &NewMI, MachineInstr &OldMI,
217 MachineInstr *cloneInstr(MachineInstr *OldMI, unsigned CurStageNum,
219 MachineInstr *cloneAndChangeInstr(MachineInstr *OldMI, unsigned CurStageNum,
322 DenseMap<MachineInstr *, MachineInstr *> CanonicalMIs;
323 DenseMap<std::pair<MachineBasicBlock *, MachineInstr *>, MachineInstr *>
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H A DLiveVariables.h90 std::vector<MachineInstr*> Kills;
95 bool removeKill(MachineInstr &MI) { in removeKill()
131 std::vector<MachineInstr *> PhysRegDef;
136 std::vector<MachineInstr *> PhysRegUse;
142 DenseMap<MachineInstr*, unsigned> DistanceMap;
152 void HandlePhysRegUse(Register Reg, MachineInstr &MI);
153 void HandlePhysRegDef(Register Reg, MachineInstr *MI,
159 MachineInstr *FindLastRefOrPartRef(Register Reg);
164 MachineInstr *FindLastPartialDef(Register Reg,
193 MachineInstr &NewMI);
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterBankInfo.h126 SmallVector<MachineInstr *, 2> DefUses;
127 SmallVector<MachineInstr *, 2> UseDefs;
137 MachineInstr *skipCopiesOutgoing(MachineInstr *MI) const;
144 MachineInstr *skipCopiesIncoming(MachineInstr *MI) const;
157 DenseMap<const MachineInstr *, SmallVector<const MachineInstr *, 2>>
160 DenseMap<const MachineInstr *, InstType> Types;
163 bool visit(const MachineInstr *MI, const MachineInstr *WaitingForTypeOfMI,
167 bool visitAdjacentInstrs(const MachineInstr *MI,
182 void startVisit(const MachineInstr *MI) { in startVisit()
204 const SmallVectorImpl<const MachineInstr *> &
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.h89 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
99 MachineInstr::MIFlag Flag = MachineInstr::NoFlags,
136 MachineInstr *optimizeSelect(MachineInstr &MI,
152 MachineInstr *emitLdStWithAddr(MachineInstr &MemI,
217 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
221 MachineInstr *convertToThreeAddress(MachineInstr &MI, LiveVariables *LV,
233 int64_t Amount, MachineInstr::MIFlag Flag = MachineInstr::NoFlags) const;
275 bool isSEXT_W(const MachineInstr &MI);
276 bool isZEXT_W(const MachineInstr &MI);
277 bool isZEXT_B(const MachineInstr &MI);
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h179 bool simplifyToLI(MachineInstr &MI, MachineInstr &DefMI,
183 bool transformToNewImmFormFedByAdd(MachineInstr &MI, MachineInstr &DefMI,
200 MachineInstr *getForwardingDefMI(MachineInstr &MI,
247 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
361 bool getFMAPatterns(MachineInstr &Root,
483 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg,
486 bool onlyFoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
554 const MachineInstr &LdSt,
618 bool combineRLWINM(MachineInstr &MI, MachineInstr **ToErase = nullptr) const;
638 MachineInstr *getDefMIPostRA(unsigned Reg, MachineInstr &MI,
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h65 static bool isGPRZero(const MachineInstr &MI);
68 static bool isGPRCopy(const MachineInstr &MI);
71 static bool isFPRCopy(const MachineInstr &MI);
97 static bool isPreLd(const MachineInstr &MI);
100 static bool isPreSt(const MachineInstr &MI);
118 static bool isHForm(const MachineInstr &MI);
121 static bool isQForm(const MachineInstr &MI);
153 MachineInstr *emitLdStWithAddr(MachineInstr &MemI,
218 MachineInstr *
458 examineCFlagsUse(MachineInstr &MI, MachineInstr &CmpInstr,
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.h30 bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
34 MachineInstr &MI) const override;
37 bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
39 bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
42 bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
49 bool legalizeBitfieldExtract(MachineInstr &MI, MachineRegisterInfo &MRI,
51 bool legalizeRotate(MachineInstr &MI, MachineRegisterInfo &MRI,
53 bool legalizeFunnelShift(MachineInstr &MI, MachineRegisterInfo &MRI,
57 bool legalizeCTPOP(MachineInstr &MI, MachineRegisterInfo &MRI,
61 bool legalizeCTTZ(MachineInstr &MI, LegalizerHelper &Helper) const;
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCOptAddrMode.cpp77 MachineInstr *tryToCombine(MachineInstr &Ldst);
85 bool canHoistLoadStoreTo(MachineInstr *Ldst, MachineInstr *To);
95 MachineInstr *canJoinInstructions(MachineInstr *Ldst, MachineInstr *Add,
198 MachineInstr *ARCOptAddrMode::tryToCombine(MachineInstr &Ldst) { in tryToCombine()
246 LLVM_DEBUG(MachineInstr *First = &Ldst; MachineInstr *Last = &Add; in tryToCombine()
274 MachineInstr *
275 ARCOptAddrMode::canJoinInstructions(MachineInstr *Ldst, MachineInstr *Add, in canJoinInstructions()
279 MachineInstr *First = Add; in canJoinInstructions()
280 MachineInstr *Last = Ldst; in canJoinInstructions()
326 MachineInstr *Result = nullptr; in canJoinInstructions()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.h201 void expandLoadStackGuard(MachineInstr *MI) const;
223 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
231 unsigned isLoadFromStackSlot(const MachineInstr &MI,
233 unsigned isStoreToStackSlot(const MachineInstr &MI,
257 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg,
270 bool PredicateInstruction(MachineInstr &MI,
286 MachineInstr *convertToThreeAddress(MachineInstr &MI, LiveVariables *LV,
288 MachineInstr *
294 MachineInstr *foldMemoryOperandImpl(
365 bool verifyInstruction(const MachineInstr &MI,
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h61 const MachineInstr &MI, unsigned DefIdx,
101 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
123 MachineInstr *convertToThreeAddress(MachineInstr &MI, LiveVariables *LV,
171 bool PredicateInstruction(MachineInstr &MI,
228 const MachineInstr &Orig,
231 MachineInstr &
239 bool produceSameValue(const MachineInstr &MI0, const MachineInstr &MI1,
303 bool analyzeSelect(const MachineInstr &MI,
307 MachineInstr *optimizeSelect(MachineInstr &MI,
313 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg,
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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DImplicitNullChecks.cpp81 static bool canHandle(const MachineInstr *MI);
86 bool canReorder(const MachineInstr *A, const MachineInstr *B);
121 MachineInstr *MemOperation;
124 MachineInstr *CheckOperation;
137 MachineInstr *OnlyDependency;
140 explicit NullCheck(MachineInstr *memOperation, MachineInstr *checkOperation, in NullCheck()
169 MachineInstr *insertFaultingInstr(MachineInstr *MI, MachineBasicBlock *MBB,
210 bool canHoistInst(MachineInstr *FaultingMI,
405 MachineInstr *ModifyingMI = nullptr; in isSuitableMemoryOp()
408 const MachineInstr *CurrMI = &*It; in isSuitableMemoryOp()
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H A DMachineInstr.cpp97 MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &TID, in MachineInstr() function in MachineInstr
117 MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI) in MachineInstr() function in MachineInstr
147 void MachineInstr::moveBefore(MachineInstr *MovePos) { in moveBefore()
383 void MachineInstr::cloneMemRefs(MachineFunction &MF, const MachineInstr &MI) { in cloneMemRefs()
541 uint32_t MachineInstr::mergeFlagsWith(const MachineInstr &Other) const { in mergeFlagsWith()
608 bool MachineInstr::isIdenticalTo(const MachineInstr &Other, in isIdenticalTo()
687 bool MachineInstr::isEquivalentDbgInstr(const MachineInstr &Other) const { in isEquivalentDbgInstr()
710 MachineInstr *MachineInstr::removeFromParent() { in removeFromParent()
715 MachineInstr *MachineInstr::removeFromBundle() { in removeFromBundle()
1352 bool MachineInstr::mayAlias(AAResults *AA, const MachineInstr &Other, in mayAlias()
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