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Searched refs:MCSchedClassDesc (Results 1 – 25 of 26) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetSchedule.h46 unsigned computeInstrLatency(const MCSchedClassDesc &SCDesc) const;
59 const MCSchedClassDesc *resolveSchedClass(const MachineInstr *MI) const;
102 const MCSchedClassDesc *SC = nullptr) const;
105 const MCSchedClassDesc *SC = nullptr) const;
109 const MCSchedClassDesc *SC = nullptr) const;
133 ProcResIter getWriteProcResBegin(const MCSchedClassDesc *SC) const { in getWriteProcResBegin()
137 ProcResIter getWriteProcResEnd(const MCSchedClassDesc *SC) const { in getWriteProcResEnd()
H A DMachineTraceMetrics.h65 struct MCSchedClassDesc;
297 ArrayRef<const MCSchedClassDesc *> ExtraInstrs = std::nullopt,
298 ArrayRef<const MCSchedClassDesc *> RemoveInstrs = std::nullopt) const;
H A DScheduleDAGInstrs.h45 struct MCSchedClassDesc;
267 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass()
H A DScheduleDAG.h39 struct MCSchedClassDesc;
253 const MCSchedClassDesc *SchedClass =
H A DMachinePipeliner.h476 void reserveResources(const MCSchedClassDesc *SCDesc, int Cycle);
478 void unreserveResources(const MCSchedClassDesc *SCDesc, int Cycle);
H A DMachineScheduler.h1013 std::pair<unsigned, unsigned> getNextResourceCycle(const MCSchedClassDesc *SC,
1044 unsigned countResource(const MCSchedClassDesc *SC, unsigned PIdx,
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetSchedule.cpp74 const MCSchedClassDesc *SC) const { in mustBeginGroup()
85 const MCSchedClassDesc *SC) const { in mustEndGroup()
96 const MCSchedClassDesc *SC) const { in getNumMicroOps()
120 const MCSchedClassDesc *TargetSchedModel::
124 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
201 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOperandLatency()
213 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI); in computeOperandLatency()
240 TargetSchedModel::computeInstrLatency(const MCSchedClassDesc &SCDesc) const { in computeInstrLatency()
266 const MCSchedClassDesc *SCDesc = resolveSchedClass(MI); in computeInstrLatency()
296 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOutputLatency()
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H A DMachineCombiner.cpp118 SmallVectorImpl<const MCSchedClassDesc *> &InstrsSC);
434 SmallVectorImpl<const MCSchedClassDesc *> &InstrsSC) { in instr2instrSC()
438 const MCSchedClassDesc *SC = SchedModel.getSchedClassDesc(Idx); in instr2instrSC()
459 SmallVector<const MCSchedClassDesc *, 16> InsInstrsSC; in preservesResourceLen()
460 SmallVector<const MCSchedClassDesc *, 16> DelInstrsSC; in preservesResourceLen()
465 ArrayRef<const MCSchedClassDesc *> MSCInsArr{InsInstrsSC}; in preservesResourceLen()
466 ArrayRef<const MCSchedClassDesc *> MSCDelArr{DelInstrsSC}; in preservesResourceLen()
H A DMachineTraceMetrics.cpp121 const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI); in getResources()
1230 ArrayRef<const MCSchedClassDesc *> ExtraInstrs, in getResourceLength()
1231 ArrayRef<const MCSchedClassDesc *> RemoveInstrs) const { in getResourceLength()
1238 auto extraCycles = [this](ArrayRef<const MCSchedClassDesc *> Instrs, in getResourceLength()
1242 for (const MCSchedClassDesc *SC : Instrs) { in getResourceLength()
H A DMachineScheduler.cpp979 const MCSchedClassDesc *SC = getSchedClass(SU); in dumpScheduleTraceTopDown()
1010 const MCSchedClassDesc *SC = getSchedClass(SU); in dumpScheduleTraceTopDown()
1061 const MCSchedClassDesc *SC = getSchedClass(SU); in dumpScheduleTraceBottomUp()
1092 const MCSchedClassDesc *SC = getSchedClass(SU); in dumpScheduleTraceBottomUp()
2247 const MCSchedClassDesc *SC = DAG->getSchedClass(&SU); in init()
2335 SchedBoundary::getNextResourceCycle(const MCSchedClassDesc *SC, unsigned PIdx, in getNextResourceCycle()
2438 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in checkHazard()
2600 unsigned SchedBoundary::countResource(const MCSchedClassDesc *SC, unsigned PIdx, in countResource()
2651 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in bumpNode()
2937 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in initResourceDelta()
H A DMachinePipeliner.cpp1086 const MCSchedClassDesc *SCDesc = in minFuncUnits()
1129 const MCSchedClassDesc *SCDesc = in calcCriticalResources()
3489 const MCSchedClassDesc *SCDesc = DAG->getSchedClass(&SU); in canReserveResources()
3515 const MCSchedClassDesc *SCDesc = DAG->getSchedClass(&SU); in reserveResources()
3534 void ResourceManager::reserveResources(const MCSchedClassDesc *SCDesc, in reserveResources()
3546 void ResourceManager::unreserveResources(const MCSchedClassDesc *SCDesc, in unreserveResources()
3648 const MCSchedClassDesc *SCDesc = DAG->getSchedClass(&SU); in calculateResMII()
H A DScheduleDAGInstrs.cpp603 const MCSchedClassDesc *SC = getSchedClass(SU); in initSUnits()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCSchedule.h118 struct MCSchedClassDesc { struct
320 const MCSchedClassDesc *SchedClassTable;
360 const MCSchedClassDesc *getSchedClassDesc(unsigned SchedClassIdx) const { in getSchedClassDesc()
369 const MCSchedClassDesc &SCDesc);
378 const MCSchedClassDesc &SCDesc);
H A DMCSubtargetInfo.h168 const MCSchedClassDesc *SC) const { in getWriteProcResBegin()
172 const MCSchedClassDesc *SC) const { in getWriteProcResEnd()
176 const MCWriteLatencyEntry *getWriteLatencyEntry(const MCSchedClassDesc *SC, in getWriteLatencyEntry()
184 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles()
206 getReadAdvanceEntries(const MCSchedClassDesc &SC) const { in getReadAdvanceEntries()
/freebsd-14.2/contrib/llvm-project/llvm/lib/MC/
H A DMCSchedule.cpp43 const MCSchedClassDesc &SCDesc) { in computeInstrLatency()
60 const MCSchedClassDesc &SCDesc = *getSchedClassDesc(SchedClass); in computeInstrLatency()
73 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
91 const MCSchedClassDesc &SCDesc) { in getReciprocalThroughput()
116 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZHazardRecognizer.cpp47 const MCSchedClassDesc *SC = getSchedClass(SU); in getNumDecoderSlots()
93 const MCSchedClassDesc *SC = getSchedClass(SU); in fitsIntoCurrentGroup()
171 const MCSchedClassDesc *SC = getSchedClass(SU); in dumpSU()
272 const MCSchedClassDesc *SC = getSchedClass(SU); in EmitInstruction()
341 const MCSchedClassDesc *SC = getSchedClass(SU); in groupingCost()
390 const MCSchedClassDesc *SC = getSchedClass(SU); in resourcesCost()
418 const MCSchedClassDesc *SC = SchedModel->resolveSchedClass(MI); in emitInstruction()
H A DSystemZHazardRecognizer.h121 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass()
H A DSystemZMachineScheduler.cpp254 const MCSchedClassDesc *SC = HazardRec->getSchedClass(SU); in releaseTopNode()
/freebsd-14.2/contrib/llvm-project/llvm/lib/MCA/
H A DInstrBuilder.cpp43 const MCSchedClassDesc &SCDesc, in initializeUsedResources()
222 const MCSchedClassDesc &SCDesc, in computeMaxLatency()
269 const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID); in populateWrites()
542 const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID); in createInstrDescImpl()
543 if (SCDesc.NumMicroOps == MCSchedClassDesc::InvalidNumMicroOps) { in createInstrDescImpl()
650 const MCSchedClassDesc &SCDesc = in createInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp58 std::vector<std::vector<MCSchedClassDesc>> ProcSchedClasses;
1035 std::vector<MCSchedClassDesc> &SCTab = SchedTables.ProcSchedClasses.back(); in GenSchedClassTables()
1041 MCSchedClassDesc &SCDesc = SCTab.back(); in GenSchedClassTables()
1061 SCDesc.NumMicroOps = MCSchedClassDesc::VariantNumMicroOps; in GenSchedClassTables()
1107 SCDesc.NumMicroOps = MCSchedClassDesc::InvalidNumMicroOps; in GenSchedClassTables()
1140 SCDesc.NumMicroOps = MCSchedClassDesc::InvalidNumMicroOps; in GenSchedClassTables()
1257 SCDesc.NumMicroOps = MCSchedClassDesc::InvalidNumMicroOps; in GenSchedClassTables()
1278 if (SCDesc.NumMicroOps == MCSchedClassDesc::InvalidNumMicroOps) { in GenSchedClassTables()
1395 std::vector<MCSchedClassDesc> &SCTab = in EmitSchedClassTables()
1408 << MCSchedClassDesc::InvalidNumMicroOps in EmitSchedClassTables()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64StorePairSuppress.cpp87 const MCSchedClassDesc *SCDesc = in shouldAddSTPToBlock()
H A DAArch64SIMDInstrOpt.cpp230 const MCSchedClassDesc *SCDesc = in shouldReplaceInst()
235 const MCSchedClassDesc *SCDescRepl; in shouldReplaceInst()
/freebsd-14.2/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DRegisterFile.cpp508 const MCSchedClassDesc *SC = SM.getSchedClassDesc(RD.SchedClassID); in collectWrites()
576 const MCSchedClassDesc *SC = SM.getSchedClassDesc(RD.SchedClassID); in checkRAWHazards()
639 const MCSchedClassDesc *SC = SM.getSchedClassDesc(RD.SchedClassID); in addRegisterRead()
/freebsd-14.2/contrib/llvm-project/llvm/tools/llvm-mca/Views/
H A DInstructionInfoView.cpp134 const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID); in collectData()
/freebsd-14.2/contrib/llvm-project/llvm/lib/MC/MCDisassembler/
H A DDisassembler.cpp210 const MCSchedClassDesc *SCDesc = SCModel.getSchedClassDesc(SCClass); in getLatency()

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