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Searched refs:MCRegister (Results 1 – 25 of 264) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h82 bool contains(MCRegister Reg1, MCRegister Reg2) const { in contains()
374 MCRegister getSubReg(MCRegister Reg, unsigned Idx) const;
378 MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx,
384 unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const;
473 bool isSubRegister(MCRegister RegA, MCRegister RegB) const { in isSubRegister()
478 bool isSuperRegister(MCRegister RegA, MCRegister RegB) const;
481 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSubRegisterEq()
487 bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperRegisterEq()
493 bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperOrSubRegisterEq()
498 bool regsOverlap(MCRegister RegA, MCRegister RegB) const;
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H A DMCRegister.h33 class MCRegister {
34 friend hash_code hash_value(const MCRegister &);
38 constexpr MCRegister(unsigned Val = 0) : Reg(Val) {} in Reg()
74 static MCRegister from(unsigned Val) { in from()
76 return MCRegister(Val); in from()
84 constexpr bool operator==(const MCRegister &Other) const {
87 constexpr bool operator!=(const MCRegister &Other) const {
109 template <> struct DenseMapInfo<MCRegister> {
116 static unsigned getHashValue(const MCRegister &Val) {
119 static bool isEqual(const MCRegister &LHS, const MCRegister &RHS) {
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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegister.h24 constexpr Register(MCRegister Val) : Reg(Val) {} in Register()
45 return MCRegister::isStackSlot(Reg); in isStackSlot()
54 return int(Reg - MCRegister::FirstStackSlot); in stackSlot2Index()
66 return MCRegister::isPhysicalRegister(Reg); in isPhysicalRegister()
72 return Reg & MCRegister::VirtualRegFlag; in isVirtualRegister()
79 return Reg & ~MCRegister::VirtualRegFlag; in virtReg2Index()
86 return Index | MCRegister::VirtualRegFlag; in index2VirtReg()
105 constexpr operator MCRegister() const { return MCRegister(Reg); } in MCRegister() function
110 MCRegister asMCReg() const { in asMCReg()
111 assert(Reg == MCRegister::NoRegister || in asMCReg()
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H A DReachingDefAnalysis.h142 int getReachingDef(MachineInstr *MI, MCRegister PhysReg) const;
146 MCRegister PhysReg) const;
155 MCRegister PhysReg) const;
160 MCRegister PhysReg) const;
176 bool isRegUsedAfter(MachineInstr *MI, MCRegister PhysReg) const;
183 int getClearance(MachineInstr *MI, MCRegister PhysReg) const;
187 void getReachingLocalUses(MachineInstr *MI, MCRegister PhysReg,
194 void getLiveOuts(MachineBasicBlock *MBB, MCRegister PhysReg,
200 bool getLiveInUses(MachineBasicBlock *MBB, MCRegister PhysReg,
239 bool isSafeToDefRegAt(MachineInstr *MI, MCRegister PhysReg,
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H A DLiveRegMatrix.h108 MCRegister PhysReg);
115 bool checkInterference(SlotIndex Start, SlotIndex End, MCRegister PhysReg);
120 void assign(const LiveInterval &VirtReg, MCRegister PhysReg);
128 bool isPhysRegUsed(MCRegister PhysReg) const;
141 MCRegister PhysReg = MCRegister::NoRegister);
147 MCRegister PhysReg);
153 LiveIntervalUnion::Query &query(const LiveRange &LR, MCRegister RegUnit);
H A DTargetRegisterInfo.h90 MCRegister getRegister(unsigned i) const { in getRegister()
371 bool isInAllocatableClass(MCRegister RegNo) const { in isInAllocatableClass()
437 bool hasRegUnit(MCRegister Reg, Register RegUnit) const { in hasRegUnit()
548 MCRegister PhysReg) const { in isAsmClobberable()
578 virtual bool isCallerPreservedPhysReg(MCRegister PhysReg, in isCallerPreservedPhysReg()
585 virtual bool isCalleeSavedPhysReg(MCRegister PhysReg,
590 MCRegister PhysReg) const { in isArgumentRegister()
596 MCRegister PhysReg) const { in isFixedRegister()
613 MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg()
1072 virtual StringRef getRegAsmName(MCRegister Reg) const { in getRegAsmName()
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H A DMachineRegisterInfo.h150 std::vector<std::pair<MCRegister, Register>> LiveIns;
254 MCRegister Reg) const;
259 void disableCalleeSavedRegister(MCRegister Reg);
649 bool isConstantPhysReg(MCRegister PhysReg) const;
853 void updateDbgUsersToReg(MCRegister OldReg, MCRegister NewReg, in updateDbgUsersToReg()
938 bool canReserveReg(MCRegister PhysReg) const { in canReserveReg()
956 bool isReserved(MCRegister PhysReg) const { in isReserved()
974 bool isAllocatable(MCRegister PhysReg) const { in isAllocatable()
997 ArrayRef<std::pair<MCRegister, Register>> liveins() const { in liveins()
1005 MCRegister getLiveInPhysReg(Register VReg) const;
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H A DCallingConvLower.h256 bool isAllocated(MCRegister Reg) const { in isAllocated()
307 bool IsShadowAllocatedReg(MCRegister Reg) const;
330 MCRegister AllocateReg(MCPhysReg Reg) { in AllocateReg()
332 return MCRegister(); in AllocateReg()
338 MCRegister AllocateReg(MCPhysReg Reg, MCPhysReg ShadowReg) { in AllocateReg()
340 return MCRegister(); in AllocateReg()
352 return MCRegister(); // Didn't find the reg. in AllocateReg()
390 MCRegister AllocateReg(ArrayRef<MCPhysReg> Regs, const MCPhysReg *ShadowRegs) { in AllocateReg()
393 return MCRegister(); // Didn't find the reg. in AllocateReg()
396 MCRegister Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc]; in AllocateReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/MC/
H A DMCRegisterInfo.cpp23 MCRegister
24 MCRegisterInfo::getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg()
32 MCRegister MCRegisterInfo::getSubReg(MCRegister Reg, unsigned Idx) const { in getSubReg()
46 unsigned MCRegisterInfo::getSubRegIndex(MCRegister Reg, in getSubRegIndex()
47 MCRegister SubReg) const { in getSubRegIndex()
72 int MCRegisterInfo::getDwarfRegNum(MCRegister RegNum, bool isEH) const { in getDwarfRegNum()
118 int MCRegisterInfo::getSEHRegNum(MCRegister RegNum) const { in getSEHRegNum()
119 const DenseMap<MCRegister, int>::const_iterator I = L2SEHRegs.find(RegNum); in getSEHRegNum()
124 int MCRegisterInfo::getCodeViewRegNum(MCRegister RegNum) const { in getCodeViewRegNum()
127 const DenseMap<MCRegister, int>::const_iterator I = L2CVRegs.find(RegNum); in getCodeViewRegNum()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegAllocGreedy.h224 MCRegister PhysReg;
236 void reset(InterferenceCache &Cache, MCRegister Reg) { in reset()
295 MCRegister selectOrSplit(const LiveInterval &,
315 MCRegister selectOrSplitImpl(const LiveInterval &,
334 void calcGapWeights(MCRegister, SmallVectorImpl<float> &);
335 void evictInterference(const LiveInterval &, MCRegister,
337 bool mayRecolorAllInterferences(MCRegister PhysReg,
342 MCRegister tryAssign(const LiveInterval &, AllocationOrder &,
344 MCRegister tryEvict(const LiveInterval &, AllocationOrder &,
369 MCRegister tryAssignCSRFirstTime(const LiveInterval &VirtReg,
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H A DRegAllocEvictionAdvisor.h107 virtual MCRegister tryFindEvictionCandidate(
114 canEvictHintInterference(const LiveInterval &VirtReg, MCRegister PhysReg,
119 bool isUnusedCalleeSavedReg(MCRegister PhysReg) const;
124 bool canReassign(const LiveInterval &VirtReg, MCRegister FromReg) const;
135 bool canAllocatePhysReg(unsigned CostPerUseLimit, MCRegister PhysReg) const;
210 MCRegister tryFindEvictionCandidate(const LiveInterval &,
213 bool canEvictHintInterference(const LiveInterval &, MCRegister,
215 bool canEvictInterferenceBasedOnCost(const LiveInterval &, MCRegister, bool,
H A DLiveRegMatrix.cpp81 const LiveInterval &VRegInterval, MCRegister PhysReg, in foreachUnit()
104 void LiveRegMatrix::assign(const LiveInterval &VirtReg, MCRegister PhysReg) { in assign()
138 bool LiveRegMatrix::isPhysRegUsed(MCRegister PhysReg) const { in isPhysRegUsed()
147 MCRegister PhysReg) { in checkRegMaskInterference()
165 MCRegister PhysReg) { in checkRegUnitInterference()
179 MCRegister RegUnit) { in query()
187 MCRegister PhysReg) { in checkInterference()
201 [&](MCRegister Unit, const LiveRange &LR) { in checkInterference()
211 MCRegister PhysReg) { in checkInterference()
247 return MCRegister::NoRegister; in getOneVReg()
H A DReachingDefAnalysis.cpp33 static bool isValidRegUseOf(const MachineOperand &MO, MCRegister PhysReg, in isValidRegUseOf()
44 static bool isValidRegDefOf(const MachineOperand &MO, MCRegister PhysReg, in isValidRegDefOf()
263 MCRegister PhysReg) const { in getReachingDef()
284 MCRegister PhysReg) const { in getReachingLocalMIDef()
320 MCRegister PhysReg) const { in getClearance()
326 MCRegister PhysReg) const { in hasLocalDefBefore()
331 MCRegister PhysReg, in getReachingLocalUses()
356 MCRegister PhysReg, in getLiveInUses()
400 MCRegister PhysReg, in getGlobalReachingDefs()
470 MCRegister PhysReg) const { in isRegUsedAfter()
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H A DMachineCopyPropagation.cpp111 SmallVector<MCRegister, 4> DefRegs;
115 DenseMap<MCRegister, CopyInfo> Copies;
122 for (MCRegister Reg : Regs) { in markRegsUnavailable()
417 bool eraseIfRedundant(MachineInstr &Copy, MCRegister Src, MCRegister Def);
492 MCRegister Src, MCRegister Def) { in eraseIfRedundant()
773 MCRegister Def = RegDef.asMCReg(); in ForwardCopyPropagateBlock()
774 MCRegister Src = RegSrc.asMCReg(); in ForwardCopyPropagateBlock()
806 MCRegister Reg = MO.getReg().asMCReg(); in ForwardCopyPropagateBlock()
844 MCRegister Reg = MO.getReg().asMCReg(); in ForwardCopyPropagateBlock()
913 for (MCRegister Reg : Defs) in ForwardCopyPropagateBlock()
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H A DInterferenceCache.h47 MCRegister PhysReg = 0;
105 PhysReg = MCRegister::NoRegister; in clear()
111 MCRegister getPhysReg() const { return PhysReg; } in getPhysReg()
123 void reset(MCRegister physReg, LiveIntervalUnion *LIUArray,
155 Entry *get(MCRegister PhysReg);
209 void setPhysReg(InterferenceCache &Cache, MCRegister PhysReg) { in setPhysReg()
H A DRegAllocBasic.cpp99 MCRegister selectOrSplit(const LiveInterval &VirtReg,
118 bool spillInterferences(const LiveInterval &VirtReg, MCRegister PhysReg,
209 MCRegister PhysReg, in spillInterferences()
259 MCRegister RABasic::selectOrSplit(const LiveInterval &VirtReg, in selectOrSplit()
262 SmallVector<MCRegister, 8> PhysRegSpillCands; in selectOrSplit()
267 for (MCRegister PhysReg : Order) { in selectOrSplit()
287 for (MCRegister &PhysReg : PhysRegSpillCands) { in selectOrSplit()
H A DMachineRegisterInfo.cpp441 for (const std::pair<MCRegister, Register> &LI : liveins()) in isLiveIn()
449 MCRegister MachineRegisterInfo::getLiveInPhysReg(Register VReg) const { in getLiveInPhysReg()
450 for (const std::pair<MCRegister, Register> &LI : liveins()) in getLiveInPhysReg()
453 return MCRegister(); in getLiveInPhysReg()
458 Register MachineRegisterInfo::getLiveInVirtReg(MCRegister PReg) const { in getLiveInVirtReg()
459 for (const std::pair<MCRegister, Register> &LI : liveins()) in getLiveInVirtReg()
574 bool MachineRegisterInfo::isPhysRegModified(MCRegister PhysReg, in isPhysRegModified()
589 bool MachineRegisterInfo::isPhysRegUsed(MCRegister PhysReg, in isPhysRegUsed()
602 void MachineRegisterInfo::disableCalleeSavedRegister(MCRegister Reg) { in disableCalleeSavedRegister()
655 MCRegister Reg) const { in isArgumentRegister()
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H A DRegAllocEvictionAdvisor.cpp168 const LiveInterval &VirtReg, MCRegister PhysReg, in canEvictHintInterference()
186 const LiveInterval &VirtReg, MCRegister PhysReg, bool IsHint, in canEvictInterferenceBasedOnCost()
275 MCRegister DefaultEvictionAdvisor::tryFindEvictionCandidate( in tryFindEvictionCandidate()
281 MCRegister BestPhys; in tryFindEvictionCandidate()
284 return MCRegister::NoRegister; in tryFindEvictionCandidate()
296 MCRegister PhysReg = *I; in tryFindEvictionCandidate()
H A DRegAllocGreedy.cpp403 MCRegister PhysReg; in tryAssign()
465 for (MCRegister Reg : in canReassign()
1066 return MCRegister::NoRegister; in tryRegionSplit()
1090 return MCRegister::NoRegister; in tryRegionSplit()
1265 MCRegister OtherPhysReg = in trySplitAroundHintReg()
1991 for (MCRegister PhysReg : Order) { in tryLastChanceRecoloring()
2077 MCRegister PhysReg; in tryLastChanceRecoloring()
2086 MCRegister PhysReg; in tryLastChanceRecoloring()
2150 MCRegister Reg = in selectOrSplit()
2256 MCRegister OtherPhysReg = in collectHintInfo()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h51 void reserveRegisterTuples(BitVector &, MCRegister Reg) const;
77 MCRegister getAlignedHighSGPRForRC(const MachineFunction &MF,
83 MCRegister reservedPrivateSegmentBufferReg(const MachineFunction &MF) const;
87 MCRegister PhysReg) const override;
177 StringRef getRegAsmName(MCRegister Reg) const override;
180 unsigned getHWRegIndex(MCRegister Reg) const { in getHWRegIndex()
284 MCRegister findUnusedRegister(const MachineRegisterInfo &MRI,
331 MCRegister getReturnAddressReg(const MachineFunction &MF) const;
359 MCRegister getVCC() const;
361 MCRegister getExec() const;
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/AsmParser/
H A DLoongArchAsmParser.cpp86 void emitLAInstSeq(MCRegister DestReg, MCRegister TmpReg,
165 MCRegister RegNum;
478 auto RegName = [](MCRegister Reg) { in print()
549 static MCRegister convertFPR32ToFPR64(MCRegister Reg) { in convertFPR32ToFPR64()
604 MCRegister RegNo; in parseRegister()
768 void LoongArchAsmParser::emitLAInstSeq(MCRegister DestReg, MCRegister TmpReg, in emitLAInstSeq()
892 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressPcrelLarge()
938 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressGotLarge()
1002 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressTLSIELarge()
1115 MCRegister SrcReg = LoongArch::R0; in emitLoadImm()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZInstPrinter.h33 static const char *getRegisterName(MCRegister Reg);
36 void printAddress(const MCAsmInfo *MAI, MCRegister Base,
37 const MCOperand &DispMO, MCRegister Index, raw_ostream &O);
42 void printFormattedRegName(const MCAsmInfo *MAI, MCRegister Reg,
46 void printRegName(raw_ostream &O, MCRegister Reg) const override;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.h37 bool isReservedReg(const MachineFunction &MF, MCRegister Reg) const;
38 bool isStrictlyReservedReg(const MachineFunction &MF, MCRegister Reg) const;
99 MCRegister PhysReg) const override;
101 MCRegister PhysReg) const override;
129 MCRegister Reg) const override;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp72 MCRegister Reg = RISCV::X0 + RegNo; in DecodeGPRRegisterClass()
80 MCRegister Reg = RISCV::X0 + RegNo; in DecodeGPRX1X5RegisterClass()
94 MCRegister Reg = RISCV::F0_H + RegNo; in DecodeFPR16RegisterClass()
105 MCRegister Reg = RISCV::F0_F + RegNo; in DecodeFPR32RegisterClass()
116 MCRegister Reg = RISCV::F8_F + RegNo; in DecodeFPR32CRegisterClass()
169 MCRegister Reg = RISCV::X8 + RegNo; in DecodeGPRCRegisterClass()
180 MCRegister Reg = RISCV::X0 + RegNo; in DecodeGPRPairRegisterClass()
202 MCRegister Reg = RISCV::V0 + RegNo; in DecodeVRRegisterClass()
216 MCRegister Reg = in DecodeVRM2RegisterClass()
233 MCRegister Reg = in DecodeVRM4RegisterClass()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/
H A DLoongArchInstPrinter.h31 void printRegName(raw_ostream &O, MCRegister Reg) const override;
44 static const char *getRegisterName(MCRegister Reg);
45 static const char *getRegisterName(MCRegister Reg, unsigned AltIdx);

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