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Searched refs:M0 (Results 1 – 25 of 93) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DInfoByHwMode.cpp153 unsigned M0 = Map.begin()->first; in operator <() local
154 return get(M0) < I.get(M0); in operator <()
158 unsigned M0 = Map.begin()->first; in operator ==() local
159 return get(M0) == I.get(M0); in operator ==()
163 unsigned M0 = Map.begin()->first; in isSubClassOf() local
164 return get(M0).isSubClassOf(I.get(M0)); in isSubClassOf()
169 unsigned M0 = Map.begin()->first; in hasStricterSpillThan() local
170 const RegSizeInfo &A0 = get(M0); in hasStricterSpillThan()
171 const RegSizeInfo &B0 = I.get(M0); in hasStricterSpillThan()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DDSDIRInstructions.td81 let Uses = [M0, EXEC];
130 (f32 (int_amdgcn_lds_direct_load M0)),
135 (f32 (int_amdgcn_lds_param_load timm:$attrchan, timm:$attr, M0)),
147 (f32 (int_amdgcn_lds_direct_load M0)),
152 (f32 (int_amdgcn_lds_param_load timm:$attrchan, timm:$attr, M0)),
H A DVINTERPInstructions.td110 let Uses = [M0, EXEC, MODE] in {
117 } // Uses = [M0, EXEC, MODE]
119 let Uses = [M0, EXEC] in {
124 } // Uses = [M0, EXEC]
H A DEXPInstructions.td25 let Uses = !if(row, [EXEC, M0], [EXEC]);
57 // ROW variants have an implicit use of M0.
160 done_val, M0),
H A DSIFixSGPRCopies.cpp715 Src0.getReg() != AMDGPU::M0) && in runOnMachineFunction()
717 Src1.getReg() != AMDGPU::M0)) { in runOnMachineFunction()
748 TII->get(AMDGPU::COPY), AMDGPU::M0) in runOnMachineFunction()
750 Src1.ChangeToRegister(AMDGPU::M0, false); in runOnMachineFunction()
780 hoistAndMergeSGPRInits(AMDGPU::M0, *MRI, TRI, *MDT, TII); in runOnMachineFunction()
878 if (DstReg == AMDGPU::M0 && in lowerSpecialCase()
H A DSOPInstructions.td340 let Uses = [M0] in {
345 } // End Uses = [M0]
359 let Uses = [M0, MODE];
360 let Defs = [M0, MODE];
393 let Uses = [M0] in {
395 } // End Uses = [M0]
446 let Uses = [M0] in {
483 } // End Uses = [M0]
519 let Uses = [M0];
1655 let Uses = [M0] in
[all …]
H A DVOP3Instructions.td350 let Uses = [MODE, M0, EXEC] in {
361 M0))]>;
362 } // End Uses = [M0, MODE, EXEC]
380 let OtherPredicates = [isNotGFX90APlus, has32BankLDS], Uses = [MODE, M0, EXEC], FPDPRounding = 1 in…
385 (i1 timm:$high), M0))]>;
386 } // End OtherPredicates = [isNotGFX90APlus, has32BankLDS], Uses = [MODE, M0, EXEC], FPDPRounding =…
388 let OtherPredicates = [isNotGFX90APlus], Uses = [MODE, M0, EXEC], FPDPRounding = 1 in {
390 } // End OtherPredicates = [isNotGFX90APlus], Uses = [MODE, M0, EXEC], FPDPRounding = 1
403 let SubtargetPredicate = isGFX8Plus, Uses = [MODE, M0, EXEC], OtherPredicates = [isNotGFX90APlus] i…
407 } // End SubtargetPredicate = isGFX8Plus, Uses = [MODE, M0, EXEC], OtherPredicates = [isNotGFX90APl…
/freebsd-14.2/crypto/openssl/crypto/poly1305/asm/
H A Dpoly1305-x86_64.pl2226 vpmuludq $T1,$S4,$M0
2238 vpmuludq $T2,$S3,$M0
2250 vpmuludq $T3,$S2,$M0
2263 vpmuludq $T4,$S1,$M0
2285 vpsrlq \$26,$D0,$M0
2304 vpsrlq \$26,$D0,$M0
2329 vpermd $R1,$M0,$R1
2330 vpermd $R2,$M0,$R2
2331 vpermd $R3,$M0,$R3
2332 vpermd $R4,$M0,$R4
[all …]
/freebsd-14.2/crypto/openssl/crypto/bn/asm/
H A Darmv4-mont.pl305 my ($Bi,$Ni,$M0)=map("d$_",(28..31));
336 vld1.32 {${M0}[0]}, [$n0,:32]
348 vmul.u32 $Ni,$Ni,$M0
398 vmul.u32 $Ni,$Ni,$M0
469 vld1.32 {${M0}[0]},[$n0,:32]
489 vmul.u32 $Ni,$Ni,$M0
526 vmul.u32 $Ni,$Ni,$M0
/freebsd-14.2/sys/contrib/device-tree/Bindings/reset/
H A Dnxp,lpc1850-rgu.txt20 12 ARM Cortex-M0 subsystem core (LPC43xx only)
56 56 ARM Cortex-M0 application core (LPC4370 only)
/freebsd-14.2/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c208 xmmi M0, M1, M2, M3, M4; in poly1305_blocks() local
382 M0 = _mm_and_si128(MMASK, T5); in poly1305_blocks()
454 v04 = M0; in poly1305_blocks()
470 v14 = M0; in poly1305_blocks()
484 v24 = M0; in poly1305_blocks()
487 v34 = M0; in poly1305_blocks()
493 v44 = M0; in poly1305_blocks()
628 M0 = _mm_unpacklo_epi32(T7, _mm_setzero_si128()); in poly1305_blocks()
635 T0 = _mm_add_epi64(T0, M0); in poly1305_blocks()
/freebsd-14.2/contrib/bc/tests/bc/errors/
H A D23.txt120 100000000M0.0001 >> 5
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEAsmPrinter.cpp177 MCOperand M032 = MCOperand::createImm(M0(32)); in emitHiLo()
216 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETGOTAndEmitMCInsts()
264 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETFunPLTAndEmitMCInsts()
312 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETTLSAddrAndEmitMCInsts()
H A DVE.h375 inline unsigned M0(unsigned Val) { return Val + 64; } in M0() function
/freebsd-14.2/sys/contrib/device-tree/src/arm/
H A Dexynos4412-i9300.dts3 * Samsung's Exynos4412 based M0 (GT-I9300) board device tree source
H A Daspeed-bmc-qcom-dc-scm-v1.dts107 /*M0-M7*/ "","","","","","","","",
H A Daspeed-bmc-vegman-n110.dts27 /*M0-M7*/ "","","","","","","","",
H A Daspeed-bmc-vegman-sx20.dts27 /*M0-M7*/ "","","","","BMC_GPU_RISER_ID1","BMC_GPU_RISER_ID0","","",
H A Daspeed-bmc-inventec-transformers.dts283 /*M0-M7*/ "","","","","","","","",
H A Daspeed-bmc-amd-daytonax.dts138 /*M0-M7*/ "","","","","","","","",
H A Daspeed-bmc-amd-ethanolx.dts135 /*M0-M7*/ "ASSERT_PWR_BTN","ASSERT_RST_BTN","ASSERT_NMI_BTN",
/freebsd-14.2/crypto/openssl/crypto/ec/asm/
H A Decp_nistz256-x86_64.pl2628 movdqa $ONE, $M0
2634 movdqa $M0, $TMP0
2635 paddd $ONE, $M0
2738 movdqa .LOne(%rip), $M0
2746 movdqa $M0, $ONE
2751 movdqa $M0, $TMP0
2752 paddd $ONE, $M0
2837 vmovdqa .LOne(%rip), $M0
2857 vpaddd $TWO, $M0, $M0
2944 vmovdqa .LOne(%rip), $M0
[all …]
/freebsd-14.2/contrib/ntp/include/
H A Dmbg_gps166.h880 l_fp M0; ///< +- Mean Anomaly at Ref. Time [rad] member
926 l_fp M0; ///< +- Mean Anomaly at Ref. Time [rad] member
/freebsd-14.2/contrib/ntp/libparse/
H A Ddata_mbg.c443 FETCH_DOUBLE(buffpp, &ephp->M0); in get_mbg_eph()
484 FETCH_DOUBLE(buffpp, &almp->M0); in get_mbg_alm()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp2296 Swap = M0 < 4; in isXXINSERTWMask()
2371 ShiftElts = IsLE ? (4 - M0) % 4 : M0; in isXXSLDWIShuffleMask()
2381 if (M0 == 0 || M0 == 7 || M0 == 6 || M0 == 5) { in isXXSLDWIShuffleMask()
2387 } else if (M0 == 4 || M0 == 3 || M0 == 2 || M0 == 1) { in isXXSLDWIShuffleMask()
2397 if (M0 == 0 || M0 == 1 || M0 == 2 || M0 == 3) { in isXXSLDWIShuffleMask()
2401 ShiftElts = M0; in isXXSLDWIShuffleMask()
2402 } else if (M0 == 4 || M0 == 5 || M0 == 6 || M0 == 7) { in isXXSLDWIShuffleMask()
2465 if ((M0 | M1) < 2) { in isXXPERMDIShuffleMask()
2466 DM = IsLE ? (((~M1) & 1) << 1) + ((~M0) & 1) : (M0 << 1) + (M1 & 1); in isXXPERMDIShuffleMask()
2477 M0 = (M0 + 2) % 4; in isXXPERMDIShuffleMask()
[all …]

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