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Searched refs:LoadReg (Results 1 – 7 of 7) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DStackSlotColoring.cpp468 unsigned LoadReg = 0; in RemoveDeadStores() local
472 if (!(LoadReg = TII->isLoadFromStackSlot(*I, FirstSS, LoadSize))) in RemoveDeadStores()
482 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1 || in RemoveDeadStores()
489 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) { in RemoveDeadStores()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUPostLegalizerCombiner.cpp399 Register LoadReg = MI.getOperand(1).getReg(); in matchCombineSignExtendInReg() local
400 if (!MRI.hasOneNonDBGUse(LoadReg)) in matchCombineSignExtendInReg()
405 MachineInstr *LoadMI = MRI.getVRegDef(LoadReg); in matchCombineSignExtendInReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp2307 Register LoadReg = getRegForValue(LI); in tryToFoldLoad() local
2308 if (!LoadReg) in tryToFoldLoad()
2314 if (!MRI.hasOneUse(LoadReg)) in tryToFoldLoad()
2319 if (FuncInfo.RegsWithFixups.contains(LoadReg)) in tryToFoldLoad()
2322 MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(LoadReg); in tryToFoldLoad()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp763 Register LoadReg; in handleConstantAddresses() local
765 LoadReg = I->second; in handleConstantAddresses()
790 LoadReg = createResultReg(RC); in handleConstantAddresses()
792 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), LoadReg); in handleConstantAddresses()
799 LocalValueMap[V] = LoadReg; in handleConstantAddresses()
804 AM.Base.Reg = LoadReg; in handleConstantAddresses()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp560 Register LoadReg = LoadMI->getDstReg(); in matchCombineExtendingLoads() local
562 LLT LoadValueTy = MRI.getType(LoadReg); in matchCombineExtendingLoads()
589 for (auto &UseMI : MRI.use_nodbg_instructions(LoadReg)) { in matchCombineExtendingLoads()
763 Register LoadReg = LoadMI->getDstReg(); in matchCombineLoadWithAndMask() local
764 LLT RegTy = MRI.getType(LoadReg); in matchCombineLoadWithAndMask()
927 Register LoadReg; in applySextInRegOfLoad() local
929 std::tie(LoadReg, ScalarSizeBits) = MatchInfo; in applySextInRegOfLoad()
930 GLoad *LoadDef = cast<GLoad>(MRI.getVRegDef(LoadReg)); in applySextInRegOfLoad()
H A DLegalizerHelper.cpp3319 Register LoadReg = DstReg; in lowerLoad() local
3326 LoadReg = MRI.createGenericVirtualRegister(WideMemTy); in lowerLoad()
3331 MIRBuilder.buildSExtInReg(LoadReg, NewLoad, MemSizeInBits); in lowerLoad()
3336 MIRBuilder.buildAssertZExt(LoadReg, NewLoad, MemSizeInBits); in lowerLoad()
3338 MIRBuilder.buildLoad(LoadReg, PtrReg, *NewMMO); in lowerLoad()
3342 MIRBuilder.buildTrunc(DstReg, LoadReg); in lowerLoad()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp4520 Register LoadReg = MI->getOperand(1).getReg(); in optimizeIntExtLoad() local
4521 LoadMI = MRI.getUniqueVRegDef(LoadReg); in optimizeIntExtLoad()