| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPostLegalizerCombiner.cpp | 405 MachineInstr *LoadMI = MRI.getVRegDef(LoadReg); in matchCombineSignExtendInReg() local 407 switch (LoadMI->getOpcode()) { in matchCombineSignExtendInReg() 409 MatchData = {LoadMI, AMDGPU::G_AMDGPU_BUFFER_LOAD_SBYTE}; in matchCombineSignExtendInReg() 412 MatchData = {LoadMI, AMDGPU::G_AMDGPU_BUFFER_LOAD_SSHORT}; in matchCombineSignExtendInReg() 415 MatchData = {LoadMI, AMDGPU::G_AMDGPU_S_BUFFER_LOAD_SBYTE}; in matchCombineSignExtendInReg() 418 MatchData = {LoadMI, AMDGPU::G_AMDGPU_S_BUFFER_LOAD_SSHORT}; in matchCombineSignExtendInReg() 428 auto [LoadMI, NewOpcode] = MatchData; in applyCombineSignExtendInReg() 429 LoadMI->setDesc(TII.get(NewOpcode)); in applyCombineSignExtendInReg() 433 LoadMI->getOperand(0).setReg(SignExtendInsnDst); in applyCombineSignExtendInReg()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 731 MachineInstr &LoadMI, in foldMemoryOperand() argument 733 assert(LoadMI.canFoldAsLoad() && "LoadMI isn't foldable!"); in foldMemoryOperand() 749 isLoadFromStackSlot(LoadMI, FrameIndex)) { in foldMemoryOperand() 754 } else if (MI.isInlineAsm() && isLoadFromStackSlot(LoadMI, FrameIndex)) { in foldMemoryOperand() 758 NewMI = foldMemoryOperandImpl(MF, MI, Ops, MI, LoadMI, LIS); in foldMemoryOperand() 766 NewMI->setMemRefs(MF, LoadMI.memoperands()); in foldMemoryOperand() 770 for (MachineInstr::mmo_iterator I = LoadMI.memoperands_begin(), in foldMemoryOperand() 771 E = LoadMI.memoperands_end(); in foldMemoryOperand()
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| H A D | InlineSpiller.cpp | 221 MachineInstr *LoadMI = nullptr); 890 MachineInstr *LoadMI) { in foldMemoryOperand() argument 938 if (LoadMI && MO.isDef()) in foldMemoryOperand() 969 LoadMI ? TII.foldMemoryOperand(*MI, FoldOps, *LoadMI, &LIS) in foldMemoryOperand()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 557 if (!LoadMI) in matchCombineExtendingLoads() 560 Register LoadReg = LoadMI->getDstReg(); in matchCombineExtendingLoads() 593 const auto &MMO = LoadMI->getMMO(); in matchCombineExtendingLoads() 760 if (!LoadMI || !MRI.hasOneNonDBGUse(LoadMI->getDstReg())) in matchCombineLoadWithAndMask() 790 if (LoadMI->isSimple()) in matchCombineLoadWithAndMask() 801 B.setInstrAndDebugLoc(*LoadMI); in matchCombineLoadWithAndMask() 806 LoadMI->eraseFromParent(); in matchCombineLoadWithAndMask() 1174 if (!LoadMI) in matchCombineExtractedVectorLoad() 1187 if (!LoadMI->isSimple()) in matchCombineExtractedVectorLoad() 1251 LoadMI->getPointerReg(), MRI.getType(LoadMI->getOperand(0).getReg()), in matchCombineExtractedVectorLoad() [all …]
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| H A D | LegalizerHelper.cpp | 1314 auto &LoadMI = cast<GLoad>(MI); in narrowScalar() local 1322 MIRBuilder.buildLoad(TmpReg, LoadMI.getPointerReg(), LoadMI.getMMO()); in narrowScalar() 1324 LoadMI.eraseFromParent(); in narrowScalar() 1332 auto &LoadMI = cast<GExtLoad>(MI); in narrowScalar() local 1337 auto &MMO = LoadMI.getMMO(); in narrowScalar() 1349 if (isa<GZExtLoad>(LoadMI)) in narrowScalar() 1354 LoadMI.eraseFromParent(); in narrowScalar() 3299 Register DstReg = LoadMI.getDstReg(); in lowerLoad() 3329 if (isa<GSExtLoad>(LoadMI)) { in lowerLoad() 3344 LoadMI.eraseFromParent(); in lowerLoad() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.h | 101 const MachineInstr &LoadMI) const;
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| H A D | MipsInstrInfo.cpp | 617 const MachineInstr &LoadMI) const { in SafeInLoadDelaySlot() 621 return !llvm::any_of(LoadMI.defs(), [&](const MachineOperand &Op) { in SafeInLoadDelaySlot()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.h | 296 MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
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| H A D | SystemZInstrInfo.cpp | 1350 MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI, in foldMemoryOperandImpl() argument
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 1296 MachineInstr &LoadMI = *I; in findMatchingStore() local 1297 Register BaseReg = AArch64InstrInfo::getLdStBaseOp(LoadMI).getReg(); in findMatchingStore() 1325 if (MI.mayStore() && isMatchingStore(LoadMI, MI) && in findMatchingStore() 1328 isLdOffsetInRangeOfSt(LoadMI, MI, TII) && in findMatchingStore() 1346 if (MI.mayStore() && LoadMI.mayAlias(AA, MI, /*UseTBAA*/ false)) in findMatchingStore()
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| H A D | AArch64FastISel.cpp | 4517 const auto *LoadMI = MI; in optimizeIntExtLoad() local 4518 if (LoadMI->getOpcode() == TargetOpcode::COPY && in optimizeIntExtLoad() 4519 LoadMI->getOperand(1).getSubReg() == AArch64::sub_32) { in optimizeIntExtLoad() 4521 LoadMI = MRI.getUniqueVRegDef(LoadReg); in optimizeIntExtLoad() 4522 assert(LoadMI && "Expected valid instruction"); in optimizeIntExtLoad() 4524 if (!(IsZExt && isZExtLoad(LoadMI)) && !(!IsZExt && isSExtLoad(LoadMI))) in optimizeIntExtLoad()
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| H A D | AArch64InstrInfo.cpp | 5602 MachineInstr &LoadMI = *--InsertPt; in foldMemoryOperandImpl() local 5603 MachineOperand &LoadDst = LoadMI.getOperand(0); in foldMemoryOperandImpl() 5607 return &LoadMI; in foldMemoryOperandImpl()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1179 MachineInstr &LoadMI, 1328 MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 7554 unsigned Opc = LoadMI.getOpcode(); in isNonFoldablePartialRegisterLoad() 7986 unsigned NumOps = LoadMI.getDesc().getNumOperands(); in foldMemoryOperandImpl() 7988 if (isLoadFromStackSlot(LoadMI, FrameIndex)) { in foldMemoryOperandImpl() 7989 if (isNonFoldablePartialRegisterLoad(LoadMI, MI, MF)) in foldMemoryOperandImpl() 8006 if (LoadMI.hasOneMemOperand()) in foldMemoryOperandImpl() 8007 Alignment = (*LoadMI.memoperands_begin())->getAlign(); in foldMemoryOperandImpl() 8009 switch (LoadMI.getOpcode()) { in foldMemoryOperandImpl() 8073 switch (LoadMI.getOpcode()) { in foldMemoryOperandImpl() 8116 unsigned Opc = LoadMI.getOpcode(); in foldMemoryOperandImpl() 8155 if (isNonFoldablePartialRegisterLoad(LoadMI, MI, MF)) in foldMemoryOperandImpl() [all …]
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| H A D | X86InstrInfo.h | 434 MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
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| H A D | X86FastISel.cpp | 791 MachineInstrBuilder LoadMI = in handleConstantAddresses() local 793 addFullAddress(LoadMI, StubAM); in handleConstantAddresses()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 651 MachineInstr *LoadMI = MRI->getVRegDef(FeedReg1); in simplifyCode() local 652 if (LoadMI && LoadMI->getOpcode() == PPC::LXVDSX) in simplifyCode()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2682 auto *LoadMI = emitLoadFromConstantPool(FPImm, MIB); in select() local 2683 if (!LoadMI) { in select() 2687 MIB.buildCopy({DefReg}, {LoadMI->getOperand(0).getReg()}); in select() 3330 auto *LoadMI = getOpcodeDef(TargetOpcode::G_LOAD, SrcReg, MRI); in select() local 3333 if (LoadMI && IsGPR) { in select() 3334 const MachineMemOperand *MemOp = *LoadMI->memoperands_begin(); in select() 4335 MachineInstr *LoadMI = nullptr; in emitLoadFromConstantPool() local 4346 LoadMI = &*MIRBuilder.buildInstr(Opc, {RC}, {Adrp}) in emitLoadFromConstantPool() 4354 LoadMI->addMemOperand(MF, MF.getMachineMemOperand(PtrInfo, in emitLoadFromConstantPool() 4357 constrainSelectedInstRegOperands(*LoadMI, TII, TRI, RBI); in emitLoadFromConstantPool() [all …]
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