Searched refs:Lo0 (Results 1 – 5 of 5) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 833 SDNode *Lo0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64() local 856 SDValue Args[] = { SDValue(Lo0, 0), SDValue(Lo1, 0) }; in SelectADD_SUB_I64() 859 SDValue Args[] = { SDValue(Lo0, 0), SDValue(Lo1, 0), N->getOperand(2) }; in SelectADD_SUB_I64()
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| H A D | SIISelLowering.cpp | 5474 SDValue Lo0, Hi0; in splitBinaryVectorOp() local 5475 std::tie(Lo0, Hi0) = DAG.SplitVectorOperand(Op.getNode(), 0); in splitBinaryVectorOp() 5481 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, in splitBinaryVectorOp() 5500 SDValue Lo0, Hi0; in splitTernaryVectorOp() local 5502 std::tie(Lo0, Hi0) = Op0.getValueType().isVector() in splitTernaryVectorOp() 5513 SDValue OpLo = DAG.getNode(Opc, SL, ResVT.first, Lo0, Lo1, Lo2, in splitTernaryVectorOp() 10239 SDValue Lo0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, LHS, Zero); in LowerSELECT() local 10242 SDValue Lo = DAG.getSelect(DL, MVT::i32, Cond, Lo0, Lo1); in LowerSELECT()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 3923 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; in SplitVecOp_VSETCC() local 3925 GetSplitVector(N->getOperand(0), Lo0, Hi0); in SplitVecOp_VSETCC() 3927 auto PartEltCnt = Lo0.getValueType().getVectorElementCount(); in SplitVecOp_VSETCC() 3934 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2)); in SplitVecOp_VSETCC() 3942 LoRes = DAG.getNode(ISD::VP_SETCC, DL, PartResVT, Lo0, Lo1, in SplitVecOp_VSETCC()
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| H A D | TargetLowering.cpp | 4992 SDValue Lo0, Lo1, Hi0, Hi1; in SimplifySetCC() local 4993 if (IsConcat(N0.getOperand(0), Lo0, Hi0) && in SimplifySetCC() 4995 return MergeConcat(DAG.getNode(N0.getOpcode(), dl, OpVT, Lo0, Lo1), in SimplifySetCC()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9410 ConstantSDNode *Lo0 = dyn_cast<ConstantSDNode>(BVN->getOperand(LoElt)); in isExtendedBUILD_VECTOR() local 9414 if (!Lo0 || !Hi0 || !Lo1 || !Hi1) in isExtendedBUILD_VECTOR() 9417 if (Hi0->getSExtValue() == Lo0->getSExtValue() >> 32 && in isExtendedBUILD_VECTOR()
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