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Searched refs:LiveIn (Results 1 – 25 of 34) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/tools/llvm-objdump/
H A DSourcePrinter.cpp164 ActiveCols[ColIdx].LiveIn = LV.liveAtAddress(ThisAddr); in update()
168 << ColIdx << ": LiveIn=" << ActiveCols[ColIdx].LiveIn in update()
171 if (!ActiveCols[ColIdx].LiveIn && !ActiveCols[ColIdx].LiveOut) in update()
183 bool LiveIn = LV.liveAtAddress(ThisAddr); in update() local
185 if (!LiveIn && !LiveOut) in update()
191 << ColIdx << ": LiveIn=" << LiveIn in update()
194 ActiveCols[ColIdx].LiveIn = LiveIn; in update()
244 (!AfterInst && ActiveCols[ColIdx].LiveIn)) in printAfterOtherLine()
300 if (ActiveCols[ColIdx2].isActive() && ActiveCols[ColIdx2].LiveIn) in printBetweenInsts()
331 else if (ActiveCols[ColIdx].LiveIn && ActiveCols[ColIdx].LiveOut) in printAfterInst()
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H A DSourcePrinter.h48 bool LiveIn = false; member
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMachineFunctionInfo.cpp63 for (const std::pair<Register, ISD::ArgFlagsTy> &LiveIn : LiveInAttrs) in isLiveInSExt() local
64 if (LiveIn.first == VReg) in isLiveInSExt()
65 return LiveIn.second.isSExt(); in isLiveInSExt()
70 for (const std::pair<Register, ISD::ArgFlagsTy> &LiveIn : LiveInAttrs) in isLiveInZExt() local
71 if (LiveIn.first == VReg) in isLiveInZExt()
72 return LiveIn.second.isZExt(); in isLiveInZExt()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DRDFLiveness.cpp864 RefMap LiveIn; in computeLiveIns() local
865 traverse(&MF.front(), LiveIn); in computeLiveIns()
933 CopyLiveIns(B, LiveIn); in resetKills()
1026 dbgs() << " LiveIn: " << Print(LiveIn, DFG) << '\n'; in traverse()
1037 dbgs() << " LiveIn: " << Print(LiveIn, DFG) << '\n'; in traverse()
1048 RefMap LiveInCopy = LiveIn; in traverse()
1049 LiveIn.clear(); in traverse()
1117 emptify(LiveIn); in traverse()
1121 dbgs() << " LiveIn: " << Print(LiveIn, DFG) << '\n'; in traverse()
1136 LiveIn[RR.Reg].insert({D.Id, RR.Mask}); in traverse()
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H A DLiveRangeCalc.cpp59 LiveIn.clear(); in reset()
64 for (const LiveInBlock &I : LiveIn) { in updateFromLiveIns()
84 LiveIn.clear(); in updateFromLiveIns()
273 LiveIn.clear(); in findReachingDefs()
316 LiveIn.reserve(WorkList.size()); in findReachingDefs()
324 LiveIn.back().Kill = Use; in findReachingDefs()
342 for (LiveInBlock &I : LiveIn) { in updateSSA()
H A DBasicBlockPathCloning.cpp183 for (auto &LiveIn : OrigBB->liveins()) in ApplyCloning() local
184 CloneBB->addLiveIn(LiveIn); in ApplyCloning()
H A DStackColoring.cpp394 BitVector LiveIn; member
545 dumpBV("LIVE_IN", BlockInfo.LiveIn); in dumpBB()
809 if (LocalLiveIn.test(BlockInfo.LiveIn)) { in calculateLocalLiveness()
811 BlockInfo.LiveIn |= LocalLiveIn; in calculateLocalLiveness()
839 for (int pos = MBBLiveness.LiveIn.find_first(); pos != -1; in calculateLiveIntervals()
840 pos = MBBLiveness.LiveIn.find_next(pos)) { in calculateLiveIntervals()
H A DAssignmentTrackingAnalysis.cpp601 auto CurrentLiveInEntry = LiveIn.find(&BB); in meet()
603 if (CurrentLiveInEntry == LiveIn.end()) { in meet()
606 LiveIn[&BB] = std::move(BBLiveIn); in meet()
899 LiveIn.init(RPONumber); in run()
932 VarFragMap LiveSet = LiveIn[BB]; in run()
2049 auto CurrentLiveInEntry = LiveIn.find(&BB); in join()
2053 if (CurrentLiveInEntry == LiveIn.end()) in join()
2078 auto CurrentLiveInEntry = LiveIn.find(&BB); in join()
2081 if (CurrentLiveInEntry == LiveIn.end()) in join()
2314 LiveIn.init(RPONumber); in run()
[all …]
H A DSplitKit.cpp242 BI.LiveIn = LVI->start <= Start; in calcLiveBlockInfo()
245 if (!BI.LiveIn) { in calcLiveBlockInfo()
272 BI.LiveIn = false; in calcLiveBlockInfo()
304 return BI.LiveIn && BI.LiveOut && BI.FirstDef && L && in calcLiveBlockInfo()
1598 if (BI.LiveIn && BI.LiveOut) in shouldSplitSingleBlock()
1750 assert(BI.LiveIn && "Must be live-in"); in splitRegInBlock()
1840 << (BI.LiveIn ? ", stack-in" : ", defined in block")); in splitRegOutBlock()
1848 if (!BI.LiveIn && (!EnterAfter || EnterAfter <= BI.FirstInstr)) { in splitRegOutBlock()
1897 << (LiveIn ? "live in" : "dead in") << ", " in print()
H A DMachineCSE.cpp725 auto LiveIn = PhysDefs.pop_back_val(); in ProcessBlockCSE() local
726 if (!MBB->isLiveIn(LiveIn.second)) in ProcessBlockCSE()
727 MBB->addLiveIn(LiveIn.second); in ProcessBlockCSE()
H A DRegAllocGreedy.cpp616 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
630 if (BI.LiveIn) { in addSplitConstraints()
860 if (BI.LiveIn && BI.LiveOut && BI.FirstDef) in calcSpillCost()
884 if (BI.LiveIn) in calcGlobalSplitCost()
945 if (BI.LiveIn) { in splitAroundRegion()
1500 BI.LiveIn ? BI.FirstInstr.getBaseIndex() : BI.FirstInstr; in calcGapWeights()
1682 const bool LiveBefore = SplitBefore != 0 || BI.LiveIn; in tryLocalSplit()
1775 bool LiveBefore = BestBefore != 0 || BI.LiveIn; in tryLocalSplit()
H A DRegisterPressure.cpp915 LaneBitmask LiveIn = Use.LaneMask & ~LiveMask; in advance() local
916 if (LiveIn.any()) { in advance()
917 discoverLiveIn(RegisterMaskPair(Reg, LiveIn)); in advance()
918 increaseRegPressure(Reg, LiveMask, LiveMask | LiveIn); in advance()
919 LiveRegs.insert(RegisterMaskPair(Reg, LiveIn)); in advance()
H A DMIRPrinter.cpp329 yaml::MachineFunctionLiveIn LiveIn; in convert() local
330 printRegMIR(LI.first, LiveIn.Register, TRI); in convert()
332 printRegMIR(LI.second, LiveIn.VirtualRegister, TRI); in convert()
333 MF.LiveIns.push_back(LiveIn); in convert()
H A DBranchRelaxation.cpp563 for (const MachineBasicBlock::RegisterMaskPair &LiveIn : Succ->liveins()) in fixupUnconditionalBranch() local
564 BranchBB->addLiveIn(LiveIn); in fixupUnconditionalBranch()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.cpp581 GCNRPTracker::LiveRegSet LiveIn, LiveOut; in runOnMachineFunction() local
586 LiveIn = LiveOut = getLiveRegs(MBBStartSlot, LIS, MRI); in runOnMachineFunction()
587 RPAtMBBEnd = getRegPressure(MRI, LiveIn); in runOnMachineFunction()
592 LiveIn = RPT.getLiveRegs(); in runOnMachineFunction()
617 LiveIn = RPT.getLiveRegs(); in runOnMachineFunction()
620 OS << PFX " Live-in: " << llvm::print(LiveIn, MRI); in runOnMachineFunction()
622 ReportLISMismatchIfAny(LiveIn, getLiveRegs(MBBStartSlot, LIS, MRI)); in runOnMachineFunction()
643 for (auto [Reg, Mask] : LiveIn) { in runOnMachineFunction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/
H A DStackLifetime.cpp203 if (BitsIn.test(BlockInfo.LiveIn)) { in calculateLocalLiveness()
204 BlockInfo.LiveIn |= BitsIn; in calculateLocalLiveness()
238 BlockInfo.LiveIn.flip(); in calculateLocalLiveness()
259 if (BlockInfo.LiveIn.test(AllocaNo)) { in calculateLiveIntervals()
306 << ", livein " << BlockInfo.LiveIn << ", liveout " in dumpBlockLiveness()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveRangeCalc.h125 SmallVector<LiveInBlock, 16> LiveIn; variable
245 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
H A DRDFLiveness.h147 void traverse(MachineBasicBlock *B, RefMap &LiveIn);
H A DMIRYamlMapping.h225 static void mapping(IO &YamlIO, MachineFunctionLiveIn &LiveIn) {
226 YamlIO.mapRequired("reg", LiveIn.Register);
228 "virtual-reg", LiveIn.VirtualRegister,
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DStackLifetime.h43 : Begin(Size), End(Size), LiveIn(Size), LiveOut(Size) {} in BlockLifetimeInfo()
52 BitVector LiveIn; member
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.cpp2919 DbgValue &LiveIn) { in vlocJoin() argument
2973 if (LiveIn.Kind != DbgValue::VPHI || LiveIn.BlockNo != MBB.getNumber()) { in vlocJoin()
2974 Changed = LiveIn != FirstVal; in vlocJoin()
2976 LiveIn = FirstVal; in vlocJoin()
3016 Changed = LiveIn != FirstVal; in vlocJoin()
3018 LiveIn = FirstVal; in vlocJoin()
3023 Changed = LiveIn != VPHI; in vlocJoin()
3025 LiveIn = VPHI; in vlocJoin()
3243 if (LiveIn->Kind == DbgValue::VPHI && LiveIn->BlockNo == (int)CurBB) { in buildVLocValueMap()
3284 if (*LiveOut != *LiveIn) { in buildVLocValueMap()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp887 Register LiveIn = MRI.getLiveInVirtReg(PhysReg); in getFunctionLiveInPhysReg() local
888 if (LiveIn) { in getFunctionLiveInPhysReg()
889 MachineInstr *Def = MRI.getVRegDef(LiveIn); in getFunctionLiveInPhysReg()
893 return LiveIn; in getFunctionLiveInPhysReg()
901 LiveIn = MF.addLiveIn(PhysReg, &RC); in getFunctionLiveInPhysReg()
903 MRI.setType(LiveIn, RegTy); in getFunctionLiveInPhysReg()
906 BuildMI(EntryMBB, EntryMBB.begin(), DL, TII.get(TargetOpcode::COPY), LiveIn) in getFunctionLiveInPhysReg()
910 return LiveIn; in getFunctionLiveInPhysReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/
H A DMIRParser.cpp642 for (const auto &LiveIn : YamlMF.LiveIns) { in parseRegisterInfo() local
644 if (parseNamedRegisterReference(PFS, Reg, LiveIn.Register.Value, Error)) in parseRegisterInfo()
645 return error(Error, LiveIn.Register.SourceRange); in parseRegisterInfo()
647 if (!LiveIn.VirtualRegister.Value.empty()) { in parseRegisterInfo()
649 if (parseVirtualRegisterReference(PFS, Info, LiveIn.VirtualRegister.Value, in parseRegisterInfo()
651 return error(Error, LiveIn.VirtualRegister.SourceRange); in parseRegisterInfo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DRewriteStatepointsForGC.cpp178 MapVector<BasicBlock *, SetVector<Value *>> LiveIn; member
3271 checkBasicSSA(DT, Data.LiveIn[&BB], BB.getTerminator()); in checkBasicSSA()
3292 Data.LiveIn[&BB] = Data.LiveSet[&BB]; in computeLiveInValues()
3293 Data.LiveIn[&BB].set_union(Data.LiveOut[&BB]); in computeLiveInValues()
3294 Data.LiveIn[&BB].set_subtract(Data.KillSet[&BB]); in computeLiveInValues()
3295 if (!Data.LiveIn[&BB].empty()) in computeLiveInValues()
3308 assert(Data.LiveIn.count(Succ)); in computeLiveInValues()
3309 LiveOut.set_union(Data.LiveIn[Succ]); in computeLiveInValues()
3325 assert(Data.LiveIn.count(BB)); in computeLiveInValues()
3326 const SetVector<Value *> &OldLiveIn = Data.LiveIn[BB]; in computeLiveInValues()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRFrameLowering.cpp264 for (const auto &LiveIn : MBB.liveins()) in spillCalleeSavedRegisters() local
265 if (STI.getRegisterInfo()->isSubRegister(LiveIn.PhysReg, Reg)) { in spillCalleeSavedRegisters()

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