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Searched refs:LastStage (Results 1 – 6 of 6) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrItineraries.h102 uint16_t LastStage; ///< Index of last + 1 stage in itinerary member
132 (Itineraries[ItinClassIndx].LastStage == UINT16_MAX)); in isEndMarker()
143 unsigned StageIdx = Itineraries[ItinClassIndx].LastStage; in endStage()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DModuloSchedule.h192 void generateProlog(unsigned LastStage, MachineBasicBlock *KernelBB,
194 void generateEpilog(unsigned LastStage, MachineBasicBlock *KernelBB,
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DModuloSchedule.cpp190 void ModuloScheduleExpander::generateProlog(unsigned LastStage, in generateProlog() argument
200 for (unsigned i = 0; i < LastStage; ++i) { in generateProlog()
249 unsigned LastStage, MachineBasicBlock *KernelBB, MachineBasicBlock *OrigBB, in generateEpilog() argument
274 int EpilogStage = LastStage + 1; in generateEpilog()
275 for (unsigned i = LastStage; i >= 1; --i, ++EpilogStage) { in generateEpilog()
288 for (unsigned StageNum = i; StageNum <= LastStage; ++StageNum) { in generateEpilog()
304 InstrMap, LastStage, EpilogStage, i == 1); in generateEpilog()
306 InstrMap, LastStage, EpilogStage, i == 1); in generateEpilog()
H A DMachinePipeliner.cpp1032 for (int Stage = 0, LastStage = Schedule.getMaxStageCount(); in computeScheduledInsts() local
1033 Stage <= LastStage; ++Stage) { in computeScheduledInsts()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.cpp436 int Size = II[SchedClass].LastStage - II[SchedClass].FirstStage; in getCVIResources()
442 unsigned Stage = II[SchedClass].LastStage - 1; in getCVIResources()
472 Stage < II[SchedClass].LastStage; ++Stage) { in getOtherReservedSlots()
/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp642 Intinerary.LastStage << ", " << in EmitItineraries()