| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 82 DAG_FUNCTION(llrint, 1, 1, experimental_constrained_llrint, LLRINT)
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 960 LLRINT, enumerator
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| H A D | BasicTTIImpl.h | 1944 ISD = ISD::LLRINT; in getTypeBasedIntrinsicInstrCost()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 886 ISD::SPLAT_VECTOR, ISD::LRINT, ISD::LLRINT}, in initActions()
938 ISD::LLROUND, ISD::LRINT, ISD::LLRINT, ISD::FROUNDEVEN}, in initActions()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 389 case ISD::LLRINT: return "llrint"; in getOperationName()
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| H A D | LegalizeVectorTypes.cpp | 105 case ISD::LLRINT: in ScalarizeVectorResult()
687 case ISD::LLRINT: in ScalarizeVectorOperand()
1105 case ISD::LLRINT: in SplitVectorResult()
3039 case ISD::LLRINT: in SplitVectorOperand()
4265 case ISD::LLRINT: in WidenVectorResult()
6057 case ISD::LLRINT: in WidenVectorOperand()
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| H A D | LegalizeFloatTypes.cpp | 937 case ISD::LLRINT: Res = SoftenFloatOp_LLRINT(N); break; in SoftenFloatOperand()
1906 case ISD::LLRINT: Res = ExpandFloatOp_LLRINT(N); break; in ExpandFloatOperand()
2235 case ISD::LLRINT: R = PromoteFloatOp_UnaryOp(N, OpNo); break; in PromoteFloatOperand()
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| H A D | LegalizeVectorOps.cpp | 408 case ISD::LLRINT: in LegalizeOp()
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| H A D | LegalizeIntegerTypes.cpp | 307 case ISD::LLRINT: in PromoteIntegerResult()
2648 case ISD::LLRINT: ExpandIntRes_XROUND_XRINT(N, Lo, Hi); break; in ExpandIntegerResult()
3832 } else if (N->getOpcode() == ISD::LLRINT || in ExpandIntRes_XROUND_XRINT()
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| H A D | LegalizeDAG.cpp | 1031 case ISD::LLRINT: in LegalizeOp()
4593 case ISD::LLRINT: in ConvertNodeToLibcall()
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| H A D | SelectionDAGBuilder.cpp | 6518 case Intrinsic::llrint: Opcode = ISD::LLRINT; break; in visitIntrinsicCall()
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| H A D | SelectionDAG.cpp | 5145 case ISD::LLRINT: in isKnownNeverNaN()
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| H A D | DAGCombiner.cpp | 2022 case ISD::LLRINT: return visitXRINT(N); in visit()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 528 def llrint : SDNode<"ISD::LLRINT" , SDTFPToIntOp>;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 422 ISD::LLRINT, ISD::LROUND, ISD::LLROUND, in RISCVTargetLowering()
816 setOperationAction({ISD::LRINT, ISD::LLRINT}, VT, Custom); in RISCVTargetLowering()
6360 case ISD::LLRINT: in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 558 setOperationAction(ISD::LLRINT, MVT::f64, Legal); in PPCTargetLowering()
559 setOperationAction(ISD::LLRINT, MVT::f32, Legal); in PPCTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 279 setOperationAction(ISD::LLRINT, MVT::f32, Custom); in X86TargetLowering()
280 setOperationAction(ISD::LLRINT, MVT::f64, Custom); in X86TargetLowering()
284 setOperationAction(ISD::LLRINT, MVT::i64, Custom); in X86TargetLowering()
797 setOperationAction(ISD::LLRINT, MVT::f80, Custom); in X86TargetLowering()
31922 case ISD::LLRINT: return LowerLRINT_LLRINT(Op, DAG); in LowerOperation()
32617 case ISD::LLRINT: { in ReplaceNodeResults()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 715 for (auto Op : {ISD::LROUND, ISD::LLROUND, ISD::LRINT, ISD::LLRINT, in AArch64TargetLowering()
772 ISD::LLROUND, ISD::LRINT, ISD::LLRINT, in AArch64TargetLowering()
6389 case ISD::LLRINT: { in LowerOperation()
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