Home
last modified time | relevance | path

Searched refs:LDS (Results 1 – 15 of 15) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DDSDIRInstructions.td1 //===-- DSDIRInstructions.td - LDS/VDS Direct Instruction Definitions -----===//
121 // LDS/VDS Direct Instructions
H A DSIMemoryLegalizer.cpp71 LDS = 1u << 1, enumerator
77 FLAT = GLOBAL | LDS | SCRATCH,
80 ATOMIC = GLOBAL | LDS | SCRATCH | GDS,
83 ALL = GLOBAL | LDS | SCRATCH | GDS | OTHER,
145 ~(SIAtomicAddrSpace::SCRATCH | SIAtomicAddrSpace::LDS)) == in SIMemOpInfo()
149 ~(SIAtomicAddrSpace::SCRATCH | SIAtomicAddrSpace::LDS | in SIMemOpInfo()
710 return SIAtomicAddrSpace::LDS; in toSIAtomicAddrSpace()
1035 if ((AddrSpace & SIAtomicAddrSpace::LDS) != SIAtomicAddrSpace::NONE) { in insertWait()
1375 AddrSpace &= ~SIAtomicAddrSpace::LDS; in insertWait()
1944 if ((AddrSpace & SIAtomicAddrSpace::LDS) != SIAtomicAddrSpace::NONE) { in insertWait()
[all …]
H A DSIInstrFormats.td532 // VINTRP instructions read parameter values from LDS, but these parameter
533 // values are stored outside of the LDS memory that is allocated to the
537 // the parameter values in LDS, this would essentially be an out-of-bounds
H A DAMDGPUISelLowering.h540 LDS, enumerator
H A DAMDGPU.td185 "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode"
227 "Switching between LDS and VMEM-tex not waiting VM_VSRC=0"
294 "The number of LDS banks per compute unit."
H A DEvergreenInstructions.td584 // LDS Instructions
H A DFLATInstructions.td68 // TODO: M0 if it could possibly access LDS (before gfx9? only)?
71 // Internally, FLAT instruction are executed as both an LDS and a
115 bits<1> lds = ps.lds; // LDS DMA for global and scratch
H A DDSInstructions.td283 // TODO: Use MMOs in the LDS address space instead of hasSideEffects = 1.
H A DAMDGPUISelLowering.cpp5456 NODE_NAME_CASE(LDS) in getTargetNodeName()
5688 case AMDGPUISD::LDS: { in computeKnownBitsForTargetNode()
H A DSIInstrInfo.td254 def SIlds : SDNode<"AMDGPUISD::LDS",
H A DSIISelLowering.cpp7205 return DAG.getNode(AMDGPUISD::LDS, DL, MVT::i32, GA); in LowerGlobalAddress()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsAMDGPU.td172 // For internal use. Coordinates LDS lowering between IR transform and backend.
548 [llvm_anyptr_ty, // LDS or GDS ptr
1750 LLVMQualPointerType<3>, // LDS base offset
1772 LLVMQualPointerType<3>, // LDS base offset
1797 LLVMQualPointerType<3>, // LDS base offset
1820 LLVMQualPointerType<3> , // LDS base offset
2007 // high selects whether high or low 16-bits are loaded from LDS
2016 // high selects whether high or low 16-bits are loaded from LDS
2503 LLVMQualPointerType<3>, // LDS base pointer to store to
2505 llvm_i32_ty, // imm offset (applied to both global and LDS address)
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrFormats.td494 // Special format for the LDS/STS instructions on AVRTiny.
H A DAVRDevices.td31 // `LDS Rd, K`
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrInfo.td1034 // Section 8.2.2 - LDS