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Searched refs:LDRD (Results 1 – 13 of 13) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp222 bool isAM3 = Opcode == ARM::LDRD || Opcode == ARM::STRD; in getMemoryOpOffset()
1766 if (Opcode != ARM::LDRD && Opcode != ARM::STRD && Opcode != ARM::t2LDRDi8) in FixInvalidRegPairOp()
1779 (Opcode == ARM::LDRD || Opcode == ARM::t2LDRDi8) && STI->isCortexM3(); in FixInvalidRegPairOp()
1781 bool NonConsecutiveRegs = (Opcode == ARM::LDRD || Opcode == ARM::STRD) && in FixInvalidRegPairOp()
1788 bool isLd = Opcode == ARM::LDRD || Opcode == ARM::t2LDRDi8; in FixInvalidRegPairOp()
2265 NewOpc = ARM::LDRD; in CanFormLdStDWord()
H A DARMISelLowering.h359 LDRD, enumerator
H A DARMScheduleA57.td395 def : InstRW<[A57WriteLdrAm3X2, A57WriteLdrAm3X2], (instregex "LDRD$")>;
441 // LDRD pre-indexed: 5(2) cyc for reg, 4(1) cyc for imm.
489 // LDRD post-indexed: 4(2) cyc for reg, 4(1) cyc for imm.
H A DARMScheduleR52.td296 "t2LDRpci_pic", "tLDRS(B|H)", "t2LDRDi8", "LDRD$", "LDA", "t2LDA")>;
H A DARMScheduleSwift.td376 (instregex "t2LDRDi8", "LDRD$")>;
H A DARMBaseInstrInfo.cpp1431 MIB = BuildMI(MBB, I, DL, get(ARM::LDRD)); in loadRegFromStackSlot()
1962 case ARM::LDRD: in areLoadsFromSameBasePtr()
3593 case ARM::LDRD: { in getNumMicroOpsSwiftLdSt()
H A DARMExpandPseudoInsts.cpp3212 TII->get(Opcode == ARM::LOADDUAL ? ARM::LDRD : ARM::STRD)) in ExpandMI()
H A DARMInstrInfo.td249 def ARMldrd : SDNode<"ARMISD::LDRD", SDT_ARMldrd, [SDNPHasChain, SDNPMayLoad, SDNPMemOperan…
2869 def LDRD : AI3ld<0b1101, 0, (outs GPR:$Rt, GPR:$Rt2), (ins addrmode3:$addr),
H A DARMISelDAGToDAG.cpp4046 case ARMISD::LDRD: { in Select()
H A DARMISelLowering.cpp1747 MAKE_CASE(ARMISD::LDRD) in getTargetNodeName()
10160 ARMISD::LDRD, dl, DAG.getVTList({MVT::i32, MVT::i32, MVT::Other}), in LowerLOAD()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp2225 case ARM::LDRD: in DecodeAddrMode3Instruction()
2259 case ARM::LDRD: in DecodeAddrMode3Instruction()
2341 case ARM::LDRD: in DecodeAddrMode3Instruction()
2354 case ARM::LDRD: in DecodeAddrMode3Instruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td2998 defm LDRD : Load64RO<0b11, 1, 0b01, FPR64Op, "ldr", f64, load>;
3180 defm LDRD : LoadUI<0b11, 1, 0b01, FPR64Op, uimm12s8, "ldr",
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp7610 case ARM::LDRD: in validateInstruction()