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Searched refs:JR (Results 1 – 19 of 19) sorted by relevance

/freebsd-14.2/sys/contrib/device-tree/Bindings/crypto/
H A Dfsl-sec6.txt72 Job Ring (JR) Node
89 Definition: Specifies a two JR parameters: an offset from
90 the parent physical address and the length the JR registers.
H A Dfsl,sec-v4.0.yaml33 Each JR is located on a separate 4k page, they may (or may not) be made visible
87 Job Ring (JR) Node. Defines data processing interface to SEC 4 across the
115 used. Value is a 12 bit value where value is a LIODN ID for this JR.
184 is a LIODN ID for this JR. This property is normally set by boot
H A Dfsl-sec4.txt37 Each JR is located on a separate 4k page, they may (or may not) be made visible
156 Job Ring (JR) Node
173 Definition: Specifies a two JR parameters: an offset from
174 the parent physical address and the length the JR registers.
183 where value is a LIODN ID for this JR. This property is
/freebsd-14.2/sys/contrib/device-tree/Bindings/powerpc/fsl/
H A Draideng.txt62 is of 12-bits which is the LIODN number for this JR.
64 transactions from this JR and than be able to do address
/freebsd-14.2/crypto/openssl/test/certs/
H A Dncca3-key.pem25 qtoKzBZzBFODMp8avJVYUYI3oVjm4CUXKbMdSNgQiFjfWKe6I0vzFxhIBOEI+5JR
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonScheduleV60.td20 // | SLOT2 | XTYPE ALU32 J JR |
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp65 return MI.getOpcode() == Mips::JR; in isIndirectJump()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrInfo.cpp470 case Mips::JR: in getEquivalentCompactForm()
550 case Mips::JR: in getEquivalentCompactForm()
881 case Mips::JR: in verifyInstruction()
H A DMipsBranchExpansion.cpp385 unsigned JR = ABI.IsN64() ? Mips::JR64 : Mips::JR; in buildProperJumpMI() local
394 JumpOp = HasR6 ? JIC : JR; in buildProperJumpMI()
H A DMipsAsmPrinter.cpp134 TmpInst0.setOpcode(Mips::JR); in emitPseudoIndirectBranch()
1074 EmitInstrReg(*STI, Mips::JR, Mips::S2); in EmitFPCallStub()
H A DMipsDelaySlotFiller.cpp752 (Opcode == Mips::JR || Opcode == Mips::PseudoIndirectBranch || in searchRange()
H A DMipsInstrInfo.td2223 def JR : MMRel, IndirectBranch<"jr", GPR32Opnd>, MTLO_FM<8>,
2278 def TAILCALLREG : TailCallReg<JR, GPR32Opnd>, ISA_MIPS1_NOT_32R6_64R6;
2281 // then are expanded to JR, JR64, JALR, or JALR64 depending on the ISA.
2296 def PseudoIndirectBranch : PseudoIndirectBranchBase<JR, GPR32Opnd>,
2301 // MipsAsmPrinter expands this into JR, JR64, JALR, or JALR64 depending on the
2687 def : MipsInstAlias<"j $rs", (JR GPR32Opnd:$rs), 0>, ISA_MIPS1;
H A DMipsScheduleP5600.td75 DERET, ERET, ERet, ERETNC, J, JR, JR_HB,
H A DMipsScheduleGeneric.td287 BLEZ, BLTZ, BLTZAL, J, JALX, JR, JR_HB, ERET,
H A DMips16InstrInfo.td755 // Format: JR ra MIPS16e
/freebsd-14.2/contrib/sendmail/contrib/
H A Dmail.local.linux118 M003U0<A#PBQ<JR\@,S@->3)#TA]L]:<M`#J?*C#ET5IO@@<-@Q#]\3<*#0(E
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.td690 def JR : InstRR<0b101, (outs), (ins GPR:$Rs2), "bt\t$Rs2",
/freebsd-14.2/contrib/sendmail/
H A DRELEASE_NOTES5836 condition. Problem noted by JR Oldroyd of TerraNet
/freebsd-14.2/share/misc/
H A Dpci_vendors17878 0019 PCI-DAS1200/JR